Browse "College of Engineering(공과대학)" by Author Kyung, Chong-Min
Showing results 313 to 372 of 565
| IEEE 표준 754에 의거한 개인용 컴퓨터용 부동소수점 연산기의 설계 = A design of floating-point arithmetic unit satisfying IEEE standard 754link 천성훈; Chun, Sung-Hoon; et al, 한국과학기술원, 1992 |
| Image quality and lifetime co-optimization in wireless multi-camera surveillance systems = 무선 다중 카메라 감시 시스템에서의 이미지 화질과 시스템 수명 최적화link Kim, Hyung-Kyu; 김형규; et al, 한국과학기술원, 2011 |
| Image quality and lifetime co-optimization in wireless multi-camera surveillance systems = 무선 다중 카메라 감시 시스템에서의 이미지 화질과 시스템 수명 최적화link Kim, Hyung-Kyu; 김형규; et al, 한국과학기술원, 2011 |
| Image quality and lifetime co-optimization in wireless multi-camera systems Kim, H.; Kim, J.; Kyung, Chong-Min, 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011, pp.2641 - 2644, IEEE, 2011-05-15 |
| Implementation of a flexible development platform for simultaneous support of software and hardware development flow Ahn, K.-Y.; Kim, S.; Kim, J.-M.; Kyung, Chong-Min, ASICON 2005: 2005 6th International Conference on ASIC, v.2, pp.886 - 889, 2005-10-24 |
| Implementation of hardware for behavioral model emulator = 행위 모델 에뮬레이터를 위한 하드웨어 구현link Kim, Young-Il; 김영일; et al, 한국과학기술원, 2000 |
| Implementation of hardware/software co-monitoing system in behavioral emulator = 행위모델 에뮬레이터에서의 하드웨어/소프트웨어 동시 모니터링 시스템 개발link Jeon, Young-Wook; 전영욱; et al, 한국과학기술원, 2001 |
| Implementation of source-level debugging system using hardware emulation = 하드웨어 에뮬레이션을 이용한 소스 레벨 디버깅 시스템의 구현link Kang, Kyong-Gu; 강경구; et al, 한국과학기술원, 1999 |
| Implementation of synchronization barrier for multiple interface blocks in data-intensive applications = 집약형 데이타 어플리케이션에서 다중 인터페이스 블럭들을 위한 동기화 배리어의 구현link Shim, Hee-Jun; 심희준; et al, 한국과학기술원, 2002 |
| Implementing the flexible development platform to verify IP for SoC with multi-core = 다중코어 SoC 상의 IP 검증을 위한 개발환경 구축link Kim, Seon-Pil; 김선필; et al, 한국과학기술원, 2004 |
| Improvement of compiled instruction set simulator by increasing flexibility and reducing compile time Chung, M.-K.; Kyung, Chong-Min, Proceedings - 15th IEEE International Workshop on Rapid Systems Prototyping, pp.38 - 44, RSP '04, 2004-06-28 |
| Improving dictionary-based code compression in VLIW architectures Nam, SJ; Park, In-Cheol; Kyung, Chong-Min, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E82A, no.11, pp.2318 - 2324, 1999-11 |
| Improving lookahead in parallel multiprocessor simulation using dynamic execution path prediction Chung, M.-K.; Kyung, Chong-Min, 20th Workshop on Principles of Advanced and Distributed Simulation, PADS 2006, pp.11 - 18, 2006-05-24 |
| In-Pixel Aperture CMOS Image Sensor for 2-D and 3-D Imaging Choi, Byoung-Soo; Kim, Sang-Hwan; Lee, Jimin; Seong, Donghyun; Shin, Jang-Kyoo; Lim, Jinyeon; Chang, Seunghyuk; et al, IEEE SENSORS JOURNAL, v.18, no.22, pp.9163 - 9168, 2018-11 |
| In-System Design Verification of Processors(Invited Paper) Kyung, Chong-Min, COOL Chips II, pp.21 - 35, 1999-04 |
| Integration of cache data allocation and voltage/frequency scaling for temperature-constrained multi-core systems with 3-D stacked cache memory Kyung, Chong-Min; Kang, Kyungsu; Jung, Jongpil; Yoo, Sungjoo, The 54th International Midwest Symposium on Circuits and Systems (MWSCAS), 123, 2011-08-09 |
Intensity guided cost metric for fast stereo matching under radiometric variations Khan, Asim; Khan, Muhammad Umar Karim; Kyung, Chong-Min, OPTICS EXPRESS, v.26, no.4, pp.4096 - 4111, 2018-02 |
| INTERACTIVE PC-BASED LOGIC DESIGN CAPTURE AND SIMULATION SYSTEM. Choi, Hun Kyu; Kim, Sung Soo; Kwon, Yong Joon; Ahn, Young Sub; Kyung, Chong-Min, Proceedings - TENCON 87: 1987 IEEE Region 10 Conference, 'Computers and Communications Technology Toward 2000'., pp.261 - 265, IEEE, 1987-08 |
| Interface synthesis between software chip model and target board Lee, SJ; Ki, A; Park, In-Cheol; Kyung, Chong-Min, JOURNAL OF SYSTEMS ARCHITECTURE, v.48, no.1-3, pp.49 - 57, 2002-09 |
| Interface Synthesis for IP Based Design Park, B.I.; Park, In-Cheol; Kyung, Chong-Min, The Second IEEE Asia Pacific Conference on ASICs (AP-ASIC'2000), pp.227 - 230, IEEE, 2000-08 |
| Internal gettering and its effects on device performances = 인터널 게터링이 소자의 동작특성에 미치는 영향link Yoon, Byoung-Jin; 윤병진; Kim, Choong-Ki; Kyung, Chong-Min; et al, 한국과학기술원, 1985 |
| IP selection for system-on-a-chip design = 시스템칩 설계를 위한 IP 선택link Kim, Byoung-Woon; 김병운; et al, 한국과학기술원, 2002 |
| iSAVE: A behavioral emulator for in-system algorithm verification Lee, S.J.; Jung, M.K.; Park, In-Cheol; Kyung, Chong-Min, The Second IEEE Asia Pacific Conference on ASICs (AP-ASIC'2000), pp.303 - 306, IEEE, 2000-08 |
| iSAVE: In-system algorithm verifier for early-stage SoC verification against actual target environment Lee, J.-G.; Kim, H.-O.; Na, S.; Kim, Y.-I.; Kyung, Chong-Min, ASICON 2005: 2005 6th International Conference on ASIC, v.1, pp.110 - 113, 2005-10-24 |
| Issues in the Design of the Marcia Internal Cache Chang, Y.S.; Park, In-Cheol; Kyung, Chong-Min, International Conference on Chip Technology, 1998-04 |
| Issues on SoC Verification Lee, Jae-Gon; Shim, Heejun; Kyung, Chong-Min, SITI Review Newsletter, 2006-09 |
| Issues on the interface synthesis between intellectual properties operating at different clock frequencies Park, B.-I.; Kyung, Chong-Min, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E85A, no.8, pp.1937 - 1945, 2002 |
| IT부품 기반기술의 전망 Kyung, Chong-Min; Moon, Gun-Woo; Yoo, Seunghyup; Choi, Kyung Cheol; Yoon, Jun-Bo; Cho, SeongHwan; Choi, Yang-Kyu; et al, TELECOMMUNICATIONS REVIEW, v.17, no.1, pp.36 - 44, 2007-02 |
| Labeling Scheme for Fault Simulation of Combination Circuits Kyung, Chong-Min; Kim, H.H.; Hwang, S.H., JTC-CSCC 91, 1991-07 |
| Latency-aware utility-based NUCA cache partitioning in 3D-stacked multi-processor systems Jung, J.; Kim, S.; Kyung, Chong-Min, 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010, pp.125 - 130, IEEE/IFIP, 2010-09-27 |
| Layer Assignment of Functional Bolcks for 3-D Hybrid IC Planning Kyung, Chong-Min; Lee, P.H., Proceedings of 1987 Joint Technical Conference on Circuits and Sytems, pp.93 - 98, 1987-07 |
| LAYER ASSIGNMENT OF FUNCTIONAL CHIP BLOCKS FOR 3-D HYBRID IC PLANNING. Kyung, Chong-Min; Lee, Pyeong-Han, IEEE International Conference on Computer-Aided Design: ICCAD-87 - Digest of Technical Papers., pp.198 - 201, 1987-11 |
| Lifetime elongation of event-driven wireless video sensor networks = 사건 감지 시 동작하는 무선 비디오 센서 네트워크의 동작 시간 증대link Jang, Jeong-Hoon; 장정훈; et al, 한국과학기술원, 2013 |
| Lifetime Elongation of Event-driven Wireless Video Sensor Networks Kyung, Chong-Min; Jang, Junghoon; Kim, Giwon, IEEE International Symposium on Circuits and Systems(ISCAS), pp.437 - 440, IEEE International Symposium on Circuits and Systems(ISCAS), 2013-05-20 |
| Lifetime maximization of mobile wireless camera system Kim, G.; Kim, J.; Kim, T.-R.; Kyung, Chong-Min, 2010 International SoC Design Conference, ISOCC 2010, pp.240 - 243, 2010 International SoC Design Conference, ISOCC 2010, 2010-11-22 |
| Lifetime Maximization of Wireless Blackbox Surveillance Camera Na, Sangkwon; Kim, Giwon; Kyung, Chong-Min, International Conference on Multimedia Expo (ICME), ICME '11, 2011-07-14 |
| Lifetime Maximization of Wireless Video Sensor Network Node by Dynamically Resizing Communication Buffer Choi, Kang-Woo; Yi, Kang; Kyung, Chong-Min, KSII TRANSACTIONS ON INTERNET AND INFORMATION SYSTEMS, v.11, no.10, pp.5129 - 5147, 2017-10 |
| Lossless Frame Memory Recompression for Video Codec Preserving Random Accessibility of Coding Unit Lee, Sang-Heon; Chung, Moo-Kyoung; Park, Sung-M; Kyung, Chong-Min, IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, v.55, pp.2105 - 2113, 2009-11 |
| Lossless frame memory recompression for video codec preserving random accessibility of coding unit = 비디오 코덱에서의 임의 접근성을 유지하는 무손실 데이터 압축 방법에 대한 연구link Lee, Sang-Heon; 이상헌; et al, 한국과학기술원, 2010 |
| Low complexity, high accuracy event detection using dct coefficients for parked mode vehicle surveillance camera = 이산 코사인 변환 계수를 이용한 차량용 감시카메라의 주차모드를 위한 저에너지 고정밀성의 사건 감지 방법link Kim, Wook-hyung; 김욱형; et al, 한국과학기술원, 2014 |
| Low latency variable length coding scheme for frame memory recompression Lee, S.; Eum, N.; Chung, M.-K.; Kyung, Chong-Min, 2010 IEEE International Conference on Multimedia and Expo, ICME 2010, pp.232 - 237, IEEE, 2010-07-19 |
| Low level currents in buried channel MOS transistorlink Kyung, Chong-Min; 경종민; et al, 한국과학기술원, 1977 |
| Low-Cost VLSI Design for Motion Estimation Using a Bit-Truncation Scheme on Both Ends Kyung, Chong-Min; Kim, Jaemoon; Kim, Giwon, IEEK Summer Conference, IEEK Summer Conference, 2010 |
| Low-power architecture exploration algorithm for AMBA3.0 AXI bus = 저전력 AXI 버스 구조의 탐색을 위한 알고리즘 구현link Yang, Sung; 양성; et al, 한국과학기술원, 2008 |
| Low-Power Bus Architecture Composition for AMBA AXI Na, Sangkwon; Yang, Sung; Kyung, Chong-Min, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.9, pp.75 - 79, 2009-06 |
| Low-Power Bus Architecture Exploration Algorithm for AMBA AXI Kyung, Chong-Min; Na, Sangkwon; Yang, Sung, 제16회 한국반도체학술대회(KCS), 2009 |
| Low-power High-Level Synthesis Using Latches Yang, W.S.; Park, In-Cheol; Kyung, Chong-Min, Asia and South Pacific Design Automation Conference(ASP-DAC), pp.462 - 465, ASP-DAC, 2001-01 |
| Mask layout generation using symbolic layout approach = Symbolic layout approach를 이용한 mask layout 의 제작link Cheon, Byoung-Yoon; 전병윤; et al, 한국과학기술원, 1987 |
| Maximizing throughput in 3D multicore architectures = 3차원 다중프로세서 아키텍처에서의 처리효율 극대화link Khan, Asim; Kyung, Chong-Min; et al, 한국과학기술원, 2011 |
| Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory Kang, K.; Jung, J.; Yoo, S.; Kyung, Chong-Min, 12th International Symposium on Quality Electronic Design, ISQED 2011, pp.577 - 582, 12th International Symposium on Quality Electronic Design, ISQED 2011, 2011-03-14 |
| MDSP-II: 16-bit DSP with mobile communication accelerator Kim, B.W.; Yang, J.H.; Kwon, Y.S.; Lee, K.M.; Kim, I.H.; Hwang, C.S.; Lee, D.H.; et al, Proceedings of the 1998 IEEE Custom Integrated Circuits Conference, pp.5 - 8, IEEE, 1998-05-11 |
| MDSP-II: A 16-bit DSP with mobile communication accelerator Kim, BW; Yang, JH; Hwang, CS; Kwon, YS; Lee, KM; Kim, IH; Lee, Yong-Hoon; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.34, no.3, pp.397 - 404, 1999-03 |
| Memory access reduction in motion estimation = 움직임 추정에서의 메모리 액세스 감소 방법link Shim, Hee-Jun; 심희준; et al, 한국과학기술원, 2008 |
| Memory efficient hardware accelerator for kernel support vector machine based pedestrian detection Khan, Asim; Kyung, Chong-Min, 13th International SoC Design Conference, ISOCC 2016, pp.127 - 128, Institute of Electrical and Electronics Engineers Inc., 2016-10-25 |
| Memory Efficient Self Guided Image Filtering Kareem, Pervaiz; Khan, Asim; Kyung, Chong-Min, International SoC Design Conference (ISOCC), pp.308 - 309, IEEE, 2017-11-07 |
| Memory reduction by intermediate result value encoding for content-based classification Oh, HS; Kyung, Chong-Min, ELECTRONICS LETTERS, v.40, pp.1041 - 1043, 2004-08 |
| Memory-efficient parametric semi-global matching Lee, Yeong Min; Park, Min Gyu; Hwang, Youngbae; Shin, Youngsoo; Kyung, Chong-Min, IEEE SIGNAL PROCESSING LETTERS, v.25, no.2, pp.194 - 198, 2018-02 |
| MetaCore: An application specific DSP development system Yang, J.H.; Kim, B.W.; Nam, S.J.; Cho, J.H.; Seo, S.W.; Ryu, C.H.; Kwon, Y.S.; et al, 35th Design Automation Conference, pp.800 - 803, IEEE, 1998-06 |
| MetaCore: An application-specific programmable DSP development system Yang, JH; Kim, BW; Nam, SJ; Kwon, YS; Lee, DH; Lee, JY; Hwang, CS; et al, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.8, no.2, pp.173 - 183, 2000-04 |
| MetaCore:A Configurable & Instruction-Level Extensible DSP Core Kyung, Chong-Min; Yang, J.H.; Kim, B.W.; Seo, S.W.; Nam, S.J.; Ryu, C.H.; Cho, J.H., ASP-DAC'98, pp.325 - 326, ASP-DAC, 1998-02 |
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