Implementation of source-level debugging system using hardware emulation = 하드웨어 에뮬레이션을 이용한 소스 레벨 디버깅 시스템의 구현

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This thesis describes an implementation of the JTAG emulator and the associated on-chip debugging unit for a VLIW(Very Long Instruction Word) DSP chip called FLOVA. The on-chip debugging unit is the debugging facility that was the part of traditional hardware-based debugger. Its functions are stopping, resuming, single-stepping, setting breakpoints and read/write accessing of registers in the FLOVA. As the internal clock frequency of a processor increases and more peripherals are integrated with a core, it becomes more difficult to implement the hardware-based debugger without the on-chip debugging support. A source-level debugger is implemented along with the JTAG emulator and on-chip debugging unit. The gate level design of FLOVA was captured with the hardware emulator.
Advisors
Kyung, Chong-Minresearcher경종민researcher
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
1999
Identifier
150808/325007 / 000973001
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 1999.2, [ [88] p. ]

Keywords

Source-level debugger; Hardware emulation; JTAG emulator; JTAG 에뮬레이터; 소스레벨 디버거; 하드웨어 에뮬레이션; JTAG

URI
http://hdl.handle.net/10203/37119
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=150808&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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