This thesis describes an implementation of the JTAG emulator and the associated on-chip debugging unit for a VLIW(Very Long Instruction Word) DSP chip called FLOVA. The on-chip debugging unit is the debugging facility that was the part of traditional hardware-based debugger. Its functions are stopping, resuming, single-stepping, setting breakpoints and read/write accessing of registers in the FLOVA. As the internal clock frequency of a processor increases and more peripherals are integrated with a core, it becomes more difficult to implement the hardware-based debugger without the on-chip debugging support. A source-level debugger is implemented along with the JTAG emulator and on-chip debugging unit. The gate level design of FLOVA was captured with the hardware emulator.