Browse "School of Electrical Engineering(전기및전자공학부)" by Author Park, Suneui
Showing results 1 to 12 of 12
| A -31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers Yoon, Heein; Kim, Juyeop; Park, Suneui; Lim, Younghyun; Lee, Yongsun; Bang, Jooeun; Lim, Kyoohyun; et al, 65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.366 - 368, Institute of Electrical and Electronics Engineers Inc., 2018-02-13 |
| A 0.1-1.5-GHz Wide Harmonic-Locking-Free Delay-Locked Loop Using an Exponential DAC Park, Suneui; Kim, Juyeop; Hwang, Chanwoong; Park, Hangi; Yoo, Seyeon; Seong, Taeho; Choi, Jaehyouk, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.29, no.8, pp.548 - 550, 2019-08 |
| A 97fsrms-Jitter and 68-Multiplication Factor, 8.16GHz Ring-Oscillator Injection-Locked Clock Multiplier with Power-Gating Injection-Locking and Background Multi-Functional Digital Calibrator Park, Suneui; Yoo, Seyeon; Shin, Yuhwan; Lee, Jeonghyun; Choi, Jaehyouk, 2022 IEEE International Solid-State Circuits Conference, ISSCC 2022, pp.212 - 214, Institute of Electrical and Electronics Engineers Inc., 2022-02 |
| A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration Yoon, Heein; Park, Suneui; Choi, Jaehyouk, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.6, pp.1564 - 1574, 2019-06 |
| A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68 Park, Suneui; Yoo, Seyeon; Shin, Yuhwan; Lee, Jeonghyun; Choi, Jaehyouk, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.1, pp.78 - 89, 2023-01 |
| An 82fsrms-Jitter and 22.5mW-Power, 102GHz W-Band PLL Using a Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector in 65nm CMOS Yoo, Seyeon; Park, Suneui; Choi, Seojin; Cho, Yoonseo; Yoon, Heein; Hwang, Chanwoong; Choi, Jaehyouk, 2021 IEEE International Solid- State Circuits Conference (ISSCC), IEEE, 2021-02-13 |
| An External Capacitorless Low-Dropout Regulator With High PSR at All Frequencies From 10 kHz to 1 GHz Using an Adaptive Supply-Ripple Cancellation Technique Lim, Younghyun; Lee, Jeonghyun; Park, Suneui; Jo, Yongwoo; Choi, Jaehyouk, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.9, pp.2675 - 2685, 2018-09 |
| An external-capacitor-less high-PSR low-dropout regulator using an adaptive supply-ripple cancellation technique to the body-gate Lim, Younghyun; Lee, Jeonghyun; Park, Suneui; Choi, Jaehyouk, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), pp.299 - 300, IEEE, 2018-01-24 |
| An Ultra-Low Integrated-Phase-Noise 28-GHz LO Generator for 5G Transceivers Supporting Multiple Frequency Bands Yoon, Heein; Park, Suneui; Kim, Juyeop; Choi, Jaehyouk, 2022 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2022, pp.2 - 3, Institute of Electrical and Electronics Engineers Inc., 2022-08 |
| An Ultra-Low Jitter, Low-Power, 102-GHz PLL Using a Power-Gating Injection-Locked Frequency Multiplier-Based Phase Detector Park, Suneui; Choi, Seojin; Yoo, Seyeon; Cho, Yoonseo; Choi, Jaehyouk, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.9, pp.2829 - 2840, 2022-09 |
| Design of ultra-low jitter, high-frequency clock generators using power-gating injection locking techniques = 파워게이팅 인젝션락킹 기술을 이용한 초저잡음, 초고주파 클락 제너레이터link Park, Suneui; Choi, Jaehyouk; et al, 한국과학기술원, 2023 |
| Ultra-low jitter low-power W/D-band phase-locked loop using power-gating injection-locked frequency multiplierbased phase detector Choi, Jaehyouk; Park, Suneui; Yoo, Seyeon; Choi, Seojin; Bang, Jooeun |
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