Browse "School of Electrical Engineering(전기및전자공학부)" by Subject Runtime
Showing results 1 to 7 of 7
| Airgap Insertion and Layer Reassignment under Setup and Hold Timing Constraints Hyun, Daijoon; Jung, Younggwang; Shin, Youngsoo, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.42, no.3, pp.987 - 999, 2023-03 |
| Containerized In-Storage Processing Model and Hardware Acceleration for Fully-Flexible Computational SSDs Gouk, Donghyun; Kwon, Miryeong; Bae, Hanyeoreum; Jung, Myoungsoo, IEEE COMPUTER ARCHITECTURE LETTERS, pp.1 - 4, 2023-06 |
| Fast timing simulation of custom digital circuits through HDL modeling = 하드웨어 기술 언어 모델링을 통한 커스텀 디지털 회로의 고속 타이밍 시뮬레이션link Lee, Seongmin; Shin, Youngsoo; et al, 한국과학기술원, 2017 |
| Intelligent SSD Firmware for Zero-Overhead Journaling Bae, Hanyeoreum; Gouk, Donghyun; Lee, Seungjun; Kim, Jiseon; Koh, Sungjoon; Zhang, Jie; Jung, Myoungsoo, IEEE COMPUTER ARCHITECTURE LETTERS, v.22, no.1, pp.25 - 28, 2023-02 |
| Memory Pooling with CXL Gouk, Donghyun; Kwon, Miryeong; Bae, Hanyeoreum; Lee, Sangwon; Jung, Myoungsoo, IEEE MICRO, v.43, no.2, pp.48 - 57, 2023-03 |
| Runtime power management for 3-dimensional processor systems = 3차원 프로세서 시스템을 위한 실시간 동적 전력 관리link Kang, Kyung-Su; 강경수; et al, 한국과학기술원, 2010 |
| Understanding the Implication of Non-Volatile Memory for Large-Scale Graph Neural Network Training Lee, Yunjae; Kwon, Youngeun; Rhu, Minsoo, IEEE COMPUTER ARCHITECTURE LETTERS, v.20, no.2, pp.118 - 121, 2021-07 |
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