A low-power CAM using pulsed NAND-NOR match-line and charge-recycling search-line driver

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This paper proposes a low-power CAM using pulsed NAND-NOR match-line and charge-recycling search-line. The pulsed NAND-NOR match-line not only significantly reduces the match-line power by activating only a few match-lines by using NAND cells for several bits but also achieves high speed by using NOR cells for most bits. The charge-recycling search-line driver reduces the search-line power by recycling the charge of search-lines without precharging. The CAM chip with 128 x 32 bit is fabricated in a 0.25-mu m CMOS process with 2.5 V. It dissipates 17.2 fJ/bit/search. It consumes 31% power of the dynamic NOR-type CAM.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2005-08
Language
English
Article Type
Article
Keywords

CONTENT-ADDRESSABLE-MEMORY; SCHEME

Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.40, pp.1736 - 1744

ISSN
0018-9200
DOI
10.1109/JSSC.2005.852028
URI
http://hdl.handle.net/10203/86172
Appears in Collection
EE-Journal Papers(저널논문)
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