Showing results 341 to 400 of 565
Labeling Scheme for Fault Simulation of Combination Circuits Kyung, Chong-Min; Kim, H.H.; Hwang, S.H., JTC-CSCC 91, 1991-07 |
Latency-aware utility-based NUCA cache partitioning in 3D-stacked multi-processor systems Jung, J.; Kim, S.; Kyung, Chong-Min, 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010, pp.125 - 130, IEEE/IFIP, 2010-09-27 |
Layer Assignment of Functional Bolcks for 3-D Hybrid IC Planning Kyung, Chong-Min; Lee, P.H., Proceedings of 1987 Joint Technical Conference on Circuits and Sytems, pp.93 - 98, 1987-07 |
LAYER ASSIGNMENT OF FUNCTIONAL CHIP BLOCKS FOR 3-D HYBRID IC PLANNING. Kyung, Chong-Min; Lee, Pyeong-Han, IEEE International Conference on Computer-Aided Design: ICCAD-87 - Digest of Technical Papers., pp.198 - 201, 1987-11 |
Lifetime elongation of event-driven wireless video sensor networks = 사건 감지 시 동작하는 무선 비디오 센서 네트워크의 동작 시간 증대link Jang, Jeong-Hoon; 장정훈; et al, 한국과학기술원, 2013 |
Lifetime Elongation of Event-driven Wireless Video Sensor Networks Kyung, Chong-Min; Jang, Junghoon; Kim, Giwon, IEEE International Symposium on Circuits and Systems(ISCAS), pp.437 - 440, IEEE International Symposium on Circuits and Systems(ISCAS), 2013-05-20 |
Lifetime maximization of mobile wireless camera system Kim, G.; Kim, J.; Kim, T.-R.; Kyung, Chong-Min, 2010 International SoC Design Conference, ISOCC 2010, pp.240 - 243, 2010 International SoC Design Conference, ISOCC 2010, 2010-11-22 |
Lifetime Maximization of Wireless Blackbox Surveillance Camera Na, Sangkwon; Kim, Giwon; Kyung, Chong-Min, International Conference on Multimedia Expo (ICME), ICME '11, 2011-07-14 |
Lifetime Maximization of Wireless Video Sensor Network Node by Dynamically Resizing Communication Buffer Choi, Kang-Woo; Yi, Kang; Kyung, Chong-Min, KSII TRANSACTIONS ON INTERNET AND INFORMATION SYSTEMS, v.11, no.10, pp.5129 - 5147, 2017-10 |
Lossless Frame Memory Recompression for Video Codec Preserving Random Accessibility of Coding Unit Lee, Sang-Heon; Chung, Moo-Kyoung; Park, Sung-M; Kyung, Chong-Min, IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, v.55, pp.2105 - 2113, 2009-11 |
Lossless frame memory recompression for video codec preserving random accessibility of coding unit = 비디오 코덱에서의 임의 접근성을 유지하는 무손실 데이터 압축 방법에 대한 연구link Lee, Sang-Heon; 이상헌; et al, 한국과학기술원, 2010 |
Low complexity, high accuracy event detection using dct coefficients for parked mode vehicle surveillance camera = 이산 코사인 변환 계수를 이용한 차량용 감시카메라의 주차모드를 위한 저에너지 고정밀성의 사건 감지 방법link Kim, Wook-hyung; 김욱형; et al, 한국과학기술원, 2014 |
Low latency variable length coding scheme for frame memory recompression Lee, S.; Eum, N.; Chung, M.-K.; Kyung, Chong-Min, 2010 IEEE International Conference on Multimedia and Expo, ICME 2010, pp.232 - 237, IEEE, 2010-07-19 |
Low level currents in buried channel MOS transistorlink Kyung, Chong-Min; 경종민; et al, 한국과학기술원, 1977 |
Low-Cost VLSI Design for Motion Estimation Using a Bit-Truncation Scheme on Both Ends Kyung, Chong-Min; Kim, Jaemoon; Kim, Giwon, IEEK Summer Conference, IEEK Summer Conference, 2010 |
Low-power architecture exploration algorithm for AMBA3.0 AXI bus = 저전력 AXI 버스 구조의 탐색을 위한 알고리즘 구현link Yang, Sung; 양성; et al, 한국과학기술원, 2008 |
Low-Power Bus Architecture Composition for AMBA AXI Na, Sangkwon; Yang, Sung; Kyung, Chong-Min, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.9, pp.75 - 79, 2009-06 |
Low-Power Bus Architecture Exploration Algorithm for AMBA AXI Kyung, Chong-Min; Na, Sangkwon; Yang, Sung, 제16회 한국반도체학술대회(KCS), 2009 |
Low-power High-Level Synthesis Using Latches Yang, W.S.; Park, In-Cheol; Kyung, Chong-Min, Asia and South Pacific Design Automation Conference(ASP-DAC), pp.462 - 465, ASP-DAC, 2001-01 |
Mask layout generation using symbolic layout approach = Symbolic layout approach를 이용한 mask layout 의 제작link Cheon, Byoung-Yoon; 전병윤; et al, 한국과학기술원, 1987 |
Maximizing throughput in 3D multicore architectures = 3차원 다중프로세서 아키텍처에서의 처리효율 극대화link Khan, Asim; Kyung, Chong-Min; et al, 한국과학기술원, 2011 |
Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory Kang, K.; Jung, J.; Yoo, S.; Kyung, Chong-Min, 12th International Symposium on Quality Electronic Design, ISQED 2011, pp.577 - 582, 12th International Symposium on Quality Electronic Design, ISQED 2011, 2011-03-14 |
MDSP-II: 16-bit DSP with mobile communication accelerator Kim, B.W.; Yang, J.H.; Kwon, Y.S.; Lee, K.M.; Kim, I.H.; Hwang, C.S.; Lee, D.H.; et al, Proceedings of the 1998 IEEE Custom Integrated Circuits Conference, pp.5 - 8, IEEE, 1998-05-11 |
MDSP-II: A 16-bit DSP with mobile communication accelerator Kim, BW; Yang, JH; Hwang, CS; Kwon, YS; Lee, KM; Kim, IH; Lee, Yong-Hoon; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.34, no.3, pp.397 - 404, 1999-03 |
Memory access reduction in motion estimation = 움직임 추정에서의 메모리 액세스 감소 방법link Shim, Hee-Jun; 심희준; et al, 한국과학기술원, 2008 |
Memory efficient hardware accelerator for kernel support vector machine based pedestrian detection Khan, Asim; Kyung, Chong-Min, 13th International SoC Design Conference, ISOCC 2016, pp.127 - 128, Institute of Electrical and Electronics Engineers Inc., 2016-10-25 |
Memory Efficient Self Guided Image Filtering Kareem, Pervaiz; Khan, Asim; Kyung, Chong-Min, International SoC Design Conference (ISOCC), pp.308 - 309, IEEE, 2017-11-07 |
Memory reduction by intermediate result value encoding for content-based classification Oh, HS; Kyung, Chong-Min, ELECTRONICS LETTERS, v.40, pp.1041 - 1043, 2004-08 |
Memory-efficient parametric semi-global matching Lee, Yeong Min; Park, Min Gyu; Hwang, Youngbae; Shin, Youngsoo; Kyung, Chong-Min, IEEE SIGNAL PROCESSING LETTERS, v.25, no.2, pp.194 - 198, 2018-02 |
MetaCore: An application specific DSP development system Yang, J.H.; Kim, B.W.; Nam, S.J.; Cho, J.H.; Seo, S.W.; Ryu, C.H.; Kwon, Y.S.; et al, 35th Design Automation Conference, pp.800 - 803, IEEE, 1998-06 |
MetaCore: An application-specific programmable DSP development system Yang, JH; Kim, BW; Nam, SJ; Kwon, YS; Lee, DH; Lee, JY; Hwang, CS; et al, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.8, no.2, pp.173 - 183, 2000-04 |
MetaCore:A Configurable & Instruction-Level Extensible DSP Core Kyung, Chong-Min; Yang, J.H.; Kim, B.W.; Seo, S.W.; Nam, S.J.; Ryu, C.H.; Cho, J.H., ASP-DAC'98, pp.325 - 326, ASP-DAC, 1998-02 |
Minimal design of multi-output static CMOS logic circuits using transistor sharing = 트랜지스터 공유를 이용하는 다출력 정적 CMOS 논리회로의 최소화 설계link Lee, Yun-Tae; 이윤태; et al, 한국과학기술원, 1994 |
Model checking using interface abstraction = 인터페이스 추상화를 이용한 모델 체킹link Jung, Hee-Jae; 정희재; et al, 한국과학기술원, 2003 |
MODULE ORIENTATION ALGORITHM USING RECONSTRUCTION OF NETS AND MEAN FIELD ANNEALING KIM, SS; Kyung, Chong-Min, ELECTRONICS LETTERS, v.27, no.13, pp.1198 - 1200, 1991-06 |
Multi-Port Gigabit Network Processor and Scalable Switch Fabric Kyung, Chong-Min; Chang, Y.S.; Yi, J.H.; Oh, H.S.; Chun, J.B.; Lee, S.W.; Lee, J.H.; et al, COOL Chips V, pp.47 - 57, 2002-04 |
Multi-Project Chip Activities in Korea-IDEC Perspective Kyung, Chong-Min; Park, In-Cheol; Song, H.J., ASP-DAC'97, 1997-07 |
Multimedia application extension processor(MAEP) Na, Sangkwon; Jung, Seungrok; Kyung, Chong-Min, 2008 International SoC Design Conference, ISOCC 2008, pp.58 - 59, 2008-11-24 |
Multiple Behavior Module Synthesis Based on Selective Groupings Yi, JH; Choi, H; Park, In-Cheol; Hwang, SH; Kyung, Chong-Min, IEEE/ACM Design, Automation and Test in Europe(DATE) Conference and Exhibition, pp.384 - 388, IEEE, 1998-02 |
N-Channel MOSFET 의 parameter 추출과 소자 simulation = Parameter extraction and device simulation on N-channel MOSFET'slink 진주현; Jin, Joo-Hyun; et al, 한국과학기술원, 1984 |
NCPA : energy-efficient voltage scaling algorithm for multiprocessor embedded system = NCPA : 멀티프로세서 임베디드 시스템을 위한 에너지 효율적인 전압 스케일링 알고리즘link Oh, Seung-Yong; 오승용; et al, 한국과학기술원, 2008 |
Near Optimal Scheduling in Automatic Data Path Synthesis Park, In-Cheol; Kyung, Chong-Min, Joint Technical Conference on Circuits/Systems, Computers and Communications, pp.305 - 310, 대한전자공학회, 1990 |
NEW DESIGN RULE CHECKER BASED ON CORNER CHECKING AND BIT MAPPING Eo, K.S.; Kyung, Chong-Min, 1985 International Symposium on Circuits and Systems - Proceedings., pp.1289 - 1292, 1985 International Symposium on Circuits and Systems - Proceedings., 1985-06 |
NEW HARDWARE ARCHITECTURE FOR FAST RASTER IMAGE GENERATION KIM, SS; EO, KS; Kyung, Chong-Min, ELECTRONICS LETTERS, v.24, no.7, pp.382 - 383, 1988-03 |
NEW HARDWARE SCHEME SUPPORTING PRECISE EXCEPTION HANDLING FOR OUT-OF-ORDER EXECUTION HWANG, GC; Kyung, Chong-Min, ELECTRONICS LETTERS, v.30, no.1, pp.16 - 17, 1994-01 |
New HDL for synchronus digital system and simulator implementation = 동기식 디지털 시스템을 위한 새로운 HDL의 제안 및 시뮬레이터 구현link Yang, Woo-Seung; 양우승; et al, 한국과학기술원, 1998 |
Node Sampling Technique to Speed Up Probability-Based Power Estimation Methods Choi, H; Kim, H; Park, In-Cheol; Hwang, Seung-Ho; Kyung, Chong-Min, Asia and South Pacific Design Automation Conference, pp.157 - 160, ASP-DAC, 1999-01 |
Novel edge-aware cost descriptors coupled with a fast aggregation engine for efficient multi-modal depth extraction = 효율적 다중 모드 깊이 추출을 위한 고속 누적 엔진이 결합된 엣지 인지 비용 기술자link Khan, Asim; Kyung, Chong-Min; et al, 한국과학기술원, 2018 |
Numerical Evaluation of Impurity Profile in Silicon H.C.Oh; Kyung, Chong-Min, 전기학회논문지, v.21, no.6, pp.17 - 26, 1984-11 |
O(n)-time standard cell placement algorithm using constrained multi-stage graph model Cho, H.G.; Kyung, Chong-Min, 1988 IEEE International Symposium on Circuits and Systems, Proceedings, v.2, pp.1687 - 1690, IEEE, 1988-06 |
Offset Aperture : A Passive Single-Lens Camera for Depth Sensing Khan, Muhammad Umar Karim; Khan, Asim; Lim, Jinyeon; Hamidov, Said; Choi, Won-Seok; Yun, Woojin; Lee, Yeongmin; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v.29, no.5, pp.1380 - 1393, 2019-05 |
OFFSET APERTURE BASED HARDWARE ARCHITECTURE FOR REAL-TIME DEPTH EXTRACTION Yun, Woojin; Kyung, Chong-Min; Kim, Young-Gyu; LEE, YEONGMIN; Lim, Jinyeon; Choi, Won-Seok; Muhammad Umar Karim, Khan; et al, 2017 IEEE International Conference on Image Processing(ICIP), pp.4392 - 4396, IEEE Signal Processing Society, 2017-09-18 |
Opportunities and Challenges of IT Collaboration with North Korea Kyung, Chong-Min, US-Korea Conference 2007, 2007 |
Optimal bit allocation scheme for rate-distortion control of video encoding in real-time video streaming system = 실시간 영상 스트리밍 시스템에서 비디오 인코딩의 비트 율-왜곡 제어를 위한 최적화된 비트 할당 방법link Kim, Giwon; 김기원; et al, 한국과학기술원, 2017 |
Optimal datapath design considering deep submicron interconnects = 심층 서브마이크론 인터커넥트를 고려한 데이타 경로 최적화link Yim, Joon-Seo; 임준서; et al, 한국과학기술원, 1998 |
OPTIMAL ENCODING OF MICROCOMMANDS IN MICROPROGRAMMED PROCESSORS Park, In-Cheol; HONG, SK; Kyung, Chong-Min, ELECTRONICS LETTERS, v.26, no.6, pp.393 - 395, 1990-03 |
Optimal Layout Algorithm for CMOS Complex Logic Modules Kyung, Chong-Min; Kwon, Y.J., International Symposium on Circuits and Systems, 1991-06 |
Optimistic Channel Usage between Simulator and Simulation Accelerator Kyung, Chong-Min; Lee, Jae-Gon, International SoC Design Conference(ISOCC) 2004, pp.392 - 395, 2004-10 |
Optimized learning rate for energy waste minimization in a background subtraction based surveillance system Kyung, Chong-Min; Khan, Muhammad Umar; Yahya Khawaja M, IEEE International Symposium on Circuits and Systems(ISCAS), pp.2355 - 2360, IEEE International Symposium on Circuits and Systems(ISCAS), 2013-05-22 |
Patch Renderer : A New Parallel Hardware Architecture for Fast Polygon Rendering Kyung, Chong-Min; S.O.Bae; G.K.Song, International Symposium on Circuits and Systems, 1991 |
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