Browse "EE-Journal Papers(저널논문)" by Title
Showing results 12541 to 12560 of 14181
| Versatile Size and Shape Microlens Arrays With High Numerical Apertures Lee, Hyunjoo J.; Kim, Yanghee; Yoon, Eui-Sung; Cho, Il-Joo, JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, v.23, no.4, pp.771 - 773, 2014-08 |
| Versatile Transfer of an Ultralong and Seamless Nanowire Array Crystallized at High Temperature for Use in High-Performance Flexible Devices Seo, Min-Ho; Yoo, Jae-Young; Choi, So-Young; Lee, Jae Shin; Choi, Kwang-Wook; Jeong, Chang Kyu; Lee, Keon Jae; et al, ACS NANO, v.11, no.2, pp.1520 - 1529, 2017-02 |
| Versatile use of ZnO interlayer in hybrid solar cells for self-powered near infra-red photo-detecting application Kim, Jun Young; Vincent, Premkumar; Jang, Jaewon; Jang, Min Seok; Choi, Muhan; Bae, Jin-Hyuk; Lee, Changhee; et al, JOURNAL OF ALLOYS AND COMPOUNDS, v.813, 2020-01 |
| Vertex adjustment method using geometric constraint for polygon-based shape coding Yun, BJ; Lee, SW; Kim, Seong-Dae, ELECTRONICS LETTERS, v.37, no.12, pp.754 - 755, 2001-06 |
| Vertical digital thermooptic switch in polymer Kwon, MS; Shin, Sang Yung; Choi, DS; Kim, KH, IEEE PHOTONICS TECHNOLOGY LETTERS, v.16, no.3, pp.783 - 785, 2004-03 |
| Vertical Inductive Bridge EBG (VIB-EBG) Structure With Size Reduction and Stopband Enhancement for Wideband SSN Suppression Kim, Myung-Hoi; Koo, Kyoung-Choul; Kim, Joung-Ho; Kim, Ji-Seong, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.22, no.8, pp.403 - 405, 2012-08 |
| Vertical InGaAs Biristor for Sub-1 V Operation Kim, Wu-Kang; Bidenko, Pavlo; Kim, Jongmin; Sim, Jaeho; Han, Joon-Kyu; Kim, Seongkwang; Geum, Dae-Myeong; et al, IEEE ELECTRON DEVICE LETTERS, v.42, no.5, pp.681 - 683, 2021-05 |
| VERTICAL INTEGRATION OF GAAS/ALGAAS LASER DIODE AND VERTICAL JFET Yoo, Hoi-Jun; Kwon, Young Se, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, v.27, no.3, pp.431 - 433, 1988-03 |
| Vertical Mirror Fabrication Combining KOH Etch and DRIE of (110) Silicon Lee, D; Yu, Kyoungsik; Krishnamoorthy, U; Solgaard, O, JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, v.18, no.1, pp.217 - 227, 2009-02 |
| Vertical Noise Coupling From On-Chip Switching-Mode Power Supply in a Mixed-Signal Stacked 3-D-IC Koo, Kyoung-Choul; Kim, Myung-Hoi; Kim, Jonghoon J.; Kim, Joung-Ho; Kim, Ji-Seong, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.3, no.3, pp.476 - 488, 2013-03 |
| Vertical stacking of three-dimensional nanostructures via an aerosol lithography for advanced optical applications Lee, Kiwoong; Choi, Hoseop; Kim, Dae Seong; Jang, Min Seok; Choi, Mansoo, NANOTECHNOLOGY, v.28, no.47, 2017-10 |
| Vertical Stepped Impedance EBG (VSI-EBG) Structure for Wideband Suppression of Simultaneous Switching Noise in Multilayer PCBs Kim, Myung-Hoi; Koo, Kyoung-Choul; Shim, Yu-Jeong; Hwang, Chul-Soon; Pak, Jun-So; Ahn, Seung-Young; Kim, Joung-Ho, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.55, no.2, pp.307 - 314, 2013-04 |
| Vertical-Pillar Ferroelectric Field-Effect-Transistor Memory Lee, Sangho; Kim, Giuk; Kim, Taeho; Eom, Taehyong; Jeon, Sanghun, PHYSICA STATUS SOLIDI-RAPID RESEARCH LETTERS, v.16, no.10, 2022-10 |
| Vertical-Tunnel Field-Effect Transistor Based on a Silicon–MoS2 Three-Dimensional–Two-Dimensional Heterostructure Shin, Gwang Hyuk; Koo, Bondae; Park, Hamin; Woo, Youngjun; Lee, Jae Eun; Choi, Sung-Yool, ACS APPLIED MATERIALS & INTERFACES, v.10, no.46, pp.40212 - 40218, 2018-11 |
Vertical-tunneling field-effect transistor based on MoTe2/MoS2 2D-2D heterojunction Koo, Bondae; Shin, Gwang Hyuk; Park, Hamin; Kim, Hojin; Choi, Sung-Yool, JOURNAL OF PHYSICS D-APPLIED PHYSICS, v.51, no.47, pp.475101, 2018-10 |
| Vertical-Tunneling Field-Effect Transistor Based on WSe2-MoS2 Heterostructure with Ion Gel Dielectric Jeon, Hyun Bae; Shin, Gwang Hyuk; Lee, Khang June; Choi, Sung-Yool, ADVANCED ELECTRONIC MATERIALS, v.6, no.7, pp.2000091, 2020-07 |
| Vertically Formed Graphene Stripe for 3D Field-Effect Transistor Applications Hong, Seul Ki; Bong, Jae Hoon; Cho, Byung-Jin; Hwang, Wan Sik, SMALL, v.13, no.3, 2017-01 |
| Vertically Integrated CMOS Ternary Logic Device with Low Static Power Consumption and High Packing Density Han, Joon-Kyu; Lee, Jung Woo; Kim, Young Bin; Yun, Seong-Yun; Yu, Jiman; Lee, Keon Jae; Choi, Yang-Kyu, ACS APPLIED MATERIALS & INTERFACES, v.15, no.44, pp.51429 - 51434, 2023-10 |
| Vertically Integrated Multiple Nanowire Field Effect Transistor Lee, Byung Hyun; Kang, Min Ho; Ahn, Dae Chul; Park, Jun Young; Bang, Tewook; Jeon, Seung Bae; Hur, Jae; et al, NANO LETTERS, v.15, no.12, pp.8056 - 8061, 2015-12 |
| Vertically Integrated Nanowire-Based Unified Memory Lee, Byung-Hyun; Ahn, Dae-Chul; Kang, Min-Ho; Jeon, Seung-Bae; Choi, Yang-Kyu, NANO LETTERS, v.16, no.9, pp.5909 - 5916, 2016-09 |
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