Extraction of the parameters of the coupling capacitance hysteresis cycle for TSV transient modeling

Abstract

The paper deals with the extraction, from the measurement, of the parameters needed to identify in time domain the hysteretic behavior of the coupling capacitance of through silicon via (TSV). The algorithm is developed in such a way that the equivalent capacitance model can be implemented into standard circuit simulators. Results showing the effect of the hysteresis on the crosstalk among TSV and IC active devices are shown and discussed.