Signal Integrity Design and Analysis of a Spiral Through-Silicon Via (TSV) Array Channel for High Bandwidth Memory (HBM)

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In this paper, we proposed the design of a spiral through-silicon via (TSV) array channel for high bandwidth memory (HBM) with 8 Gbps data transmission. In 12-stacked HBM, we design the spiral TSV array including the physical structure and pin assignment to reduce channel loss and via-to-via crosstalk. To verify the proposed channel, the channel model is extracted by a high-frequency structure simulator (HFSS). The electrical performance is simulated and analyzed in the frequency and time domains. As a result, the proposed design successfully improves eye height and width at 8 Gbps compared to the conventional spiral TSV array.
Publisher
IEEE
Issue Date
2021-12-13
Language
English
Citation

IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021

ISSN
2151-1225
DOI
10.1109/EDAPS53774.2021.9657033
URI
http://hdl.handle.net/10203/304938
Appears in Collection
EE-Conference Papers(학술회의논문)
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