Capacitor-Less 4F(2) DRAM Using Vertical InGaAs Junction for Ultimate Cell Scalability

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In this work, we demonstrated capacitor-less 4F(2) 2-terminal InGaAs npn junction DRAM through careful device design. Using epitaxially grown InGaAs which have a steep junction, fabricated InGaAs bistable resistor (biristor) DRAM showed low voltage operation (similar to 2 V), fast switching speed (<:20 ns), long-term retention (10(3) s at 85 degrees C), and high endurance (>10(10) cycles) with a high sensing margin. Considering this feasibility study, we believe that InGaAs n(+)pn(+) junction DRAM could be a good technological option for future scalable 3D DRAM.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2022-11
Language
English
Article Type
Article
Citation

IEEE ELECTRON DEVICE LETTERS, v.43, no.11, pp.1834 - 1837

ISSN
0741-3106
DOI
10.1109/LED.2022.3204436
URI
http://hdl.handle.net/10203/299571
Appears in Collection
EE-Journal Papers(저널논문)
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