(An) area-efficient reconfigurable CNN-LSTM architecture for automatic speech recognition system음성인식 시스템을 위한 면적 효율적인 재구성 가능한 CNN-LSTM 아키텍처

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Recently, deep neural networks replace all stages of state-of-the-art automatic speech recognition (ASR) algorithms. Also, current segregated modules for voice activity detection (VAD) and speech recognition (SR) are highly area-inefficient. Therefore, we propose the first end-to-end neural network reconfigurable real-time ASR hardware architecture using a CNN-LSTM dual core system. The aggregation of separated modules and adaptation of the Winograd algorithm to CNN core both drastically reduce the overall area overhead. We further improve the energy efficiency by frame packaging scheme and partial power/clock gating onto the core. The proposed architecture achieves 61.2% area reduction and 93.6% energy reduction of always-on process.
Advisors
Kim, Lee-Supresearcher김이섭researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2018
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2018.2,[iv, 39 p. :]

Keywords

CMOS digital integrated circuits▼aSpeech recognition▼adeep neural network (DNN)▼aconvolutional neural networkc (CNN)▼along short-term memory (LSTM)▼aWinograd matrix multiplication▼adual core memory allocation; CMOS 디지털 집적회로▼a음성인식▼a심층 신경회로망▼a컨볼루셔널 신경회로망▼a롱 쇼트-텀 메모리▼a위노그라드 매트릭스 곱 연산▼a듀얼 코어 메모리 할당

URI
http://hdl.handle.net/10203/266726
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=734200&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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