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Browse "School of Electrical Engineering(전기및전자공학부)" by Author Balasubramanian, N

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Showing results 1 to 15 of 15

1	Behavior of Effective Work Function in Metal/High-K Gate Stack under High Temperature Process Cho, Byung Jin; Joo, MS; Chi, DZ; Balasubramanian, N; Kwong, DL, Conf. on Solid State Devices and Materials (SSDM), pp.0 - 0, 2004-09-14
2	Channel mobility behaviour in high-K/metal gate NMOSFETs Cho, Byung Jin; Mathew, S; Bera, LK; Balasubramanian, N; Joo, MS, 2nd International Conference on Materials for Advanced Technologies, pp.516 - 516, 2003-12-11
3	Channel mobility degradation and charge trapping in high-k/metal gate NMOSFETs Mathew, S; Bera, LK; Balasubramanian, N; Joo, MS; Cho, Byung Jin, THIN SOLID FILMS, v.462, pp.11 - 14, 2004-09
4	Effect of surface NH3 anneal on the physical and electrical properties of HfO2 films on Ge substrate Wu, N; Zhang, QC; Zhu, CX; Yeo, CC; Whang, SJ; Chan, DSH; Li, MF; et al, APPLIED PHYSICS LETTERS, v.84, no.19, pp.3741 - 3743, 2004-05
5	Electrical and physical properties of Si1-xGex/HfO2/Si MOS-capacitors Cho, Byung Jin; Wu, N; Zhu, C; Balasubramanian, N; Yeo, CC; Joo, MS; Yu, HY, 2nd International Conference on Materials for Advanced Technologies, pp.535 - 535, 2003-12-11
6	Feasibility study of using thin aluminum nitride film as a buffer layer for dual metal gate process Park, CS; Cho, Byung Jin; Balasubramanian, N; Kwong, DL, THIN SOLID FILMS, v.462, pp.15 - 18, 2004-09
7	Formation of hafnium-aluminum-oxide gate dielectric using single cocktail liquid source in MOCVD process Joo, MS; Cho, Byung Jin; Yeo, CC; Chan, DSH; Whoang, SJ; Mathew, S; Bera, LK; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.50, no.10, pp.2088 - 2094, 2003-10
8	Improvement of electrical properties of MOCVD HfO2 by multistep deposition Yeo, CC; Cho, Byung Jin; Joo, MS; Whoang, SJ; Kwong, DL; Bera, LK; Mathew, S; et al, ELECTROCHEMICAL AND SOLID STATE LETTERS, v.6, no.11, pp.F42 - F44, 2003-11
9	Integrated high-k (k similar to 19) MIM capacitor with Cu/low-k interconnects for RF application Yu, MB; Xiong, YZ; Kim, SJ; Balakumar, S; Zhu, CX; Li, MF; Cho, Byung Jin; et al, IEEE ELECTRON DEVICE LETTERS, v.26, no.11, pp.793 - 795, 2005-11
10	Interface configuration and Fermi-level pinning of fully silicided gate and high-K dielectric stack Joo, MS; Park, CS; Cho, Byung Jin; Balasubramanian, N; Kwong, DL, JOURNAL OF VACUUM SCIENCE TECHNOLOGY B, v.24, no.3, pp.1341 - 1343, 2006-05
11	MOCVD HfAlxOy gate dielectrics deposited using single cocktail liquid source Cho, Byung Jin; Joo, MS; Yeo, CC; Whoang, SJ; Matthew, S; Bera, LK; Balasubramanian, N, 2003 International Conf. on Solid State Devices and Materials (SSDM), pp.0 - 0, 2003-09-19
12	Role of Si in Fermil-level pinning phenomena in metal/high-K dielectric gate stack Cho, Byung Jin; Joo, MS; Balasubramanian, N; Kwong, DL, International Conference on Materials for Advanced Technologies, pp.40 - 40, 2005-07-03
13	Stoichiometry dependence of fermi-level pinning in fully silicided (FUSI) NiSi gate on high-K dielectric Joo, MS; Cho, Byung Jin; Balasubramanian, N; Kwong, DL, IEEE ELECTRON DEVICE LETTERS, v.26, no.12, pp.882 - 884, 2005-12
14	Thermal instability of effective work function in metal/high-kappa stack and its material dependence Joo, MS; Cho, Byung Jin; Balasubramanian, N; Kwong, DL, IEEE ELECTRON DEVICE LETTERS, v.25, no.11, pp.716 - 718, 2004-11
15	Wet etching characteristics and surface morphology evaluation of MOCVD grown HfO2 film Balasubramanian, M; Bera, LK; Mathew, S; Balasubramanian, N; Lim, V; Joo, MS; Cho, Byung Jin, THIN SOLID FILMS, v.462, no.SI, pp.101 - 105, 2004-09

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