Browse "Dept. of Industrial and Systems Engineering(산업및시스템공학과)" by Subject semiconductor manufacturing
Showing results 1 to 24 of 24
| Adaptive Scheduling of Cluster Tools With Wafer Delay Constraints and Process Time Variation Lim, Yuchul; Yu, Tae-Sun; Lee, Tae-Eog, IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, v.17, no.1, pp.375 - 388, 2020-01 |
| Analysis of Backward Sequence for Single-Armed Cluster Tools With Processing Time Variations Lee, Jun-Ho; Kim, Jun-Ho, IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, v.17, no.4, pp.2167 - 2174, 2020-10 |
| Classification of Mixed-Type Defect Patterns in Wafer Bin Maps Using Convolutional Neural Networks Kyeong, Kiryong; Kim, Heeyoung, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.31, no.3, pp.395 - 402, 2018-08 |
| Cleaning Plan Optimization for Dual-Armed Cluster Tools With General Chamber Cleaning Periods Lee, Tae-Gyung; Yu, Tae-Sun; Lee, Tae-Eog, IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, v.20, no.3, pp.1890 - 1906, 2023-07 |
| Closed-Form Expressions on Lot Completion Time for Dual-Armed Cluster Tools With Parallel Processing Modules Kim, Hyunjung; Lee, Jun-Ho, IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, v.16, no.2, pp.898 - 907, 2019-04 |
| Congestion-aware dynamic routing for an overhead hoist transporter system using a graph convolutional gated recurrent unit Ahn, Kyuree; Lee, Kanghoon; Yeon, Juneyoung; Park, Jinkyoo, IISE TRANSACTIONS, v.54, no.8, pp.803 - 816, 2022-08 |
| Detection and clustering of mixed-type defect patterns in wafer bin maps Kim, Jinho; Lee, Youngmin; Kim, Heeyoung, IISE TRANSACTIONS , v.50, no.2, pp.99 - 111, 2018-01 |
| Detection and clustering of mixed-type defect patterns in Wafer Bin maps = 웨이퍼 빈 맵의 혼합된 형태의 결함 패턴 탐지 및 분류link Kim, Jinho; 김진호; et al, 한국과학기술원, 2016 |
| Feedback Control of Cluster Tools for Regulating Wafer Delays Kim, Chulhan; Lee, Tae-Eog, IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, v.13, no.2, pp.1189 - 1199, 2016-04 |
| Feedback control of cluster tools with time constraints = 시간 제약을 가지는 클러스터 장비의 피드백 제어link Kim, Chulhan; 김철한; et al, 한국과학기술원, 2015 |
| Heuristics for minimizing makespan on parallel dedicated machines with family setups = 셋업이 있는 병렬 전용 기계 공정에서의 최대 종료 시간을 최소화 하는 스케쥴링 알고리듬 개발link Kim, Kyoung-Yeon; 김경연; et al, 한국과학기술원, 2007 |
| Memory-Augmented Convolutional Neural Networks With Triplet Loss for Imbalanced Wafer Defect Pattern Classification Hyun, Yunseung; Kim, Heeyoung, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.33, no.4, pp.622 - 634, 2020-11 |
| Minimization of Waiting Time Variation in a Generalized Two-Machine Flowshop With Waiting Time Constraints and Skipping Jobs Yu, Tae Sun; Kim, Hyunjung; Lee, Tae-Eog, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.30, no.2, pp.155 - 165, 2017-05 |
| Modelling and analysis of semiconductor manufacturing in a shrinking world: challenges and successes Chien, CF; Dauzere-Peres, S; Ehm, H; Fowler, JW; Jiang, ZB; Krishnaswamy, S; Lee, Tae-Eog; et al, EUROPEAN JOURNAL OF INDUSTRIAL ENGINEERING, v.5, no.3, pp.254 - 271, 2011 |
| Prediction of Highly Imbalanced Semiconductor Chip-Level Defects in Module Tests Using Multimodal Fusion and Logit Adjustment Cho, Hunsung; Koo, Wonmo; Kim, Heeyoung, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.36, no.3, pp.425 - 433, 2023-08 |
| Scheduling a wet station for wafer cleaning with multiple job flows and multiple wafer-handling robots Lee, Tae-Eog; Lee, HY; Lee, SJ, INTERNATIONAL JOURNAL OF PRODUCTION RESEARCH, v.45, no.3, pp.487 - 507, 2007-02 |
| Scheduling Algorithms for Minimizing Tardiness of Orders at the Burn-in Workstation in a Semiconductor Manufacturing System Kim, Yeong-Dae; Kang, Jae-Hun; Lee, Gyeong-Eun; Lim, Seung-Kil, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.24, no.1, pp.14 - 26, 2011-02 |
| Scheduling Single-Armed Cluster Tools With Chamber Cleaning Operations Yu, Tae Sun; Kim, Hyunjung; Lee, Tae-Eog, IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, v.15, no.2, pp.705 - 716, 2018-04 |
| SECAM: A Supervisory Equipment Control Application Model for Integrated Semiconductor Manufacturing Equipment, Lee, JH; Lee, Tae-Eog, IEEE ROBOTICS & AUTOMATION MAGAZINE, v.11, no.1, pp.41 - 58, 2004-03 |
| The Impact of Processing Time Variations on Swap Sequence Performance in Dual-Armed Cluster Tools Lee, Jun-Ho; Kim, Hyun-Jung, IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, v.20, no.4, pp.2668 - 2677, 2023-10 |
| Variational Deep Clustering of Wafer Map Patterns Hwang, Jonghyun; Kim, Heeyoung, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.33, no.3, pp.466 - 475, 2020-08 |
| Virtual control - A virtual cluster tool for testing and verifying a cluster tool controller and a scheduler Joo, YJ; Lee, Tae-Eog, IEEE ROBOTICS & AUTOMATION MAGAZINE, v.11, no.3, pp.33 - 49, 2004-09 |
| Wafer delay analysis and control of dual-armed cluster tools with chamber cleaning operations Yu, Tae-Sun; Lee, Tae-Eog, INTERNATIONAL JOURNAL OF PRODUCTION RESEARCH, v.58, no.2, pp.434 - 447, 2020-01 |
| Wafer Delay Analysis and Workload Balancing of Parallel Chambers for Dual-Armed Cluster Tools With Multiple Wafer Types Ko, Sung-Gil; Yu, Tae-Sun; Lee, Tae-Eog, IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, v.18, no.3, pp.1516 - 1526, 2021-07 |
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