DSpace at KOASAS: High frequency electrical circuit model of chip-to-chip vertical via iterconnection for 3-D chip stacking package

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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

High frequency electrical circuit model of chip-to-chip vertical via iterconnection for 3-D chip stacking package

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Ryu, C. / Chung, D. / Lee, J. / Lee, K. / Oh, T. / Kim, Joungho researcher

Issue Date: 2005-10-24

Language: ENG

Citation: 14th Topical Meeting on Electrical Performance of Electronic Packaging 2005, v.2005, pp.151 - 154

URI: http://hdl.handle.net/10203/140877

Appears in Collection: EE-Conference Papers(학술회의논문)

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