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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

High frequency electrical circuit model of chip-to-chip vertical via iterconnection for 3-D chip stacking package

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dc.contributor.authorRyu, C.-
dc.contributor.authorChung, D.-
dc.contributor.authorLee, J.-
dc.contributor.authorLee, K.-
dc.contributor.authorOh, T.-
dc.contributor.authorKim, Joungho-
dc.date.accessioned2013-03-17T06:57:35Z-
dc.date.available2013-03-17T06:57:35Z-
dc.date.created2012-02-06-
dc.date.issued2005-10-24-
dc.identifier.citation14th Topical Meeting on Electrical Performance of Electronic Packaging 2005, v.2005, no., pp.151 - 154-
dc.identifier.urihttp://hdl.handle.net/10203/140877-
dc.languageENG-
dc.titleHigh frequency electrical circuit model of chip-to-chip vertical via iterconnection for 3-D chip stacking package-
dc.typeConference-
dc.identifier.scopusid2-s2.0-33845882999-
dc.type.rimsCONF-
dc.citation.volume2005-
dc.citation.beginningpage151-
dc.citation.endingpage154-
dc.citation.publicationname14th Topical Meeting on Electrical Performance of Electronic Packaging 2005-
dc.identifier.conferencecountryUnited States-
dc.identifier.conferencecountryUnited States-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorRyu, C.-
dc.contributor.nonIdAuthorChung, D.-
dc.contributor.nonIdAuthorLee, J.-
dc.contributor.nonIdAuthorLee, K.-
dc.contributor.nonIdAuthorOh, T.-
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EE-Conference Papers(학술회의논문)
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