Browse by Subject delay-locked loop (DLL)

Showing results 1 to 4 of 4

1
A 20 Gb/s 1 : 4 DEMUX without inductors and low-power divide-by-2 circuit in 0.13 mu m CMOS technology

Kim, BG; Kim, Lee-Sup; Byun, S; Yu, HK, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.43, pp.541 - 549, 2008-02

2
A 250-MHz-2-GHz wide-range delay-locked loop

Kim, BG; Kim, Lee-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.40, pp.1310 - 1321, 2005-06

3
A DLL With Jitter Reduction Techniques and Quadrature Phase Generation for DRAM Interfaces

Kim, BG; Kim, Lee-Sup; Park, KI; Jun, YH; Cho, SI; Kim, LS; Jun, YH; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.44, pp.1522 - 1530, 2009-05

4
A Sub-nW Single-Supply 32-kHz Sub-Harmonic Pulse Injection Crystal Oscillator

Kim, Keun-Mok; Kim, Subin; Choi, Kyung-Sik; Jung, Hyunki; Ko, Jinho; Lee, Sang-Gug, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.6, pp.1849 - 1858, 2021-06

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