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Showing results 15 to 22 of 22

15
Semicustom design methodology for power gated circuits for low leakage applications = 낮은 누설 전류를 갖는 응용을 위한 파워 게이팅 회로의 세미커스텀 설계 방법link

Kim, Hyung-Ock; 김형옥; et al, 한국과학기술원, 2009

16
Signal Integrity Analysis of Through-Silicon Via (TSV) With a Silicon Dioxide Well to Reduce Leakage Current for High-Bandwidth Memory Interface

Kim, Hyunwoong; Lee, Seonghi; Park, Jongcheol; Shin, Yujun; Woo, Seongho; Kim, Jongwook; Cho, Jaeyong; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.13, no.5, pp.700 - 714, 2023-05

17
Skewed Flip-Flop and Mixed-V-t Gates for Minimizing Leakage in Sequential Circuits

Seomun, Jun; Kim, Jae-Hyun; Shin, Young-Soo, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.27, pp.1956 - 1968, 2008-11

18
Skewed flip-flop transformation for minimizing leakage in sequential circuits = 순차 회로의 누설 전류를 줄이기 위한 비대칭 플립 플롭 변환link

Seomun, Jun; 서문, 준; et al, 한국과학기술원, 2007

19
Stacked-FET linear SOI CMOS SPDT antenna switch with input P1 dB greater than 40 dBm

Im, Dong-Gu; Lee, Kwy-Ro, IEICE ELECTRONICS EXPRESS, v.9, no.24, pp.1813 - 1822, 2012-12

20
Thermal stability and electrical properties of SrBi2Ta2-xNbxO9/IrOx capacitors with Pt top electrode

Kweon, SY; Choi, Si-Kyung; Yang, WS; Yeom, SJ; Roh, JS, JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES REVIEW PAPERS, v.40, no.9A, pp.5275 - 5280, 2001-09

21
금속유기화학기상증착법을 이용한 heavily doped Si 기판에서의 $CoSi_2$ layer의 성장거동 및 접합특성에 관한 연구 = Growth behavior of $CoSi_2$ layer on heavily doped Si and junction characteristics using metalorganic chemical vapor depositionlink

이희승; Lee, Heui-Seung; et al, 한국과학기술원, 2002

22
소수운반자 수명 측정을 이용한 HgCdTe 표면특성분석 = Surface property analysis of HgCdTe by lifetime meausrementlink

이민영; Lee, Min-Yung; et al, 한국과학기술원, 2002

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