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1
Characteristics of solid-phase diffused ultra-shallow junction using phosphorus doped silicon oxide films for fabrication of sub-100 nm SOI MOSFET

Cho, WJ; Im, K; Yang, JH; Oh, Jihun; Lee, S, JOURNAL OF MATERIALS SCIENCE, v.39, no.5, pp.1819 - 1821, 2004-03

2
Defect-free ultra-shallow source/drain extension using spin-on-dopants for deep submicron SOI MOSFET applications

Yang, JH; Oh, Jihun; Cho, WJ; Lee, SJ; Im, KJ; Park, K, JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.44, no.2, pp.423 - 426, 2004-02

3
Fabrication and process simulation of SOI MOSFETs with a 30-nm gate length

Cho, WJ; Yang, JH; Im, K; Oh, Jihun; Lee, S; Parr, K, JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.43, no.5, pp.892 - 897, 2003-11

4
Fabrication of 50-nm gate SOI n-MOSFETs using novel plasma-doping technique

Cho, WJ; Ahn, CG; Im, KJ; Yang, JH; Oh, Jihun; Baek, IB; Lee, S, IEEE ELECTRON DEVICE LETTERS, v.25, no.6, pp.366 - 368, 2004-06

5
Ultra shallow and abrupt n(+)-p junction formations on silicon-on-insulator by solid phase diffusion of arsenic from spin-on-dopant for sub 50 nm Si metal-oxide-semiconductor devices

Oh, Jihun; Im, K; Ahn, CG; Yang, JH; Cho, WJ; Lee, S; Park, K, MATERIALS SCIENCE AND ENGINEERING B-SOLID STATE MATERIALS FOR ADVANCED TECHNOLOGY, v.110, no.2, pp.185 - 189, 2004-07

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