Defect-free ultra-shallow junction (USJ) formation methods were investigated for sub-50-nm gate-length SOI MOSFET applications by using phosphorus solid-phase diffusion (SPD) and plasma doping (PLAD). NMOSFETs with a gate length of 50-nm and n(+)-p junction diodes were successfully fabricated on SOI substrates. Defect-free n(+)-p junctions with extremely shallow junction depth and low sheet resistance were achieved by using SPD. Moreover, the SPD process generated no crystal defects, which are unavoidable in the ion implantation process and are a primary source of junction leakage currents. The electrical characteristics of n(+)-p junction diodes fabricated using SPD were superior to those fabricated using PLAD, and the SOI NMOSFET with its source/drain extension doped by using SPD showed good short-channel performance. These results demonstrate that solid-phase diffusion can be promising candidate for sub-50-nm MOSFET technologies.