A mode-changeable 2-D DCT/IDCT processor for digital VCR

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In a digital VCR, DCT/IDCT is performed by both 8x8 mode and 2x4x8 mode to improve coding efficiency, In this paper, a new 2-D DCT/IDCT processor which requires minimal hardware overhead for 8x8/2x4x8 mode change for digital VCR is presented. The proposed DCT/IDCT processor uses a concurrent architecture and executes both DCT and IDCT with 8x8 and 2x4x8 mode selection. This chip is implemented on the basis of the row-column decomposition scheme. The proposed architecture minimizes hardware overhead for 2x4x8 mode by sharing the same datapath with 8x8 mode as much as possible. The proposed architecture also reduces the hardware and the chip size by exploiting the table look-up method instead of the extra multiplication circuits in the weighting coefficients handling. The implemented DCT/lDCT processor satisfies the accuracy specification of digital VCR.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
1996-08
Language
English
Article Type
Article
Keywords

DISCRETE COSINE TRANSFORM

Citation

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, v.42, no.3, pp.606 - 616

ISSN
0098-3063
URI
http://hdl.handle.net/10203/76795
Appears in Collection
EE-Journal Papers(저널논문)
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