Browse "College of Engineering(공과대학)" by Subject Low power DDR4▼aMobile DRAM interface▼aBang-bang phase detector (BBPD)▼aQuadrature clock signal corrector▼aSelf-calibrated offset delay▼aClock generator▼aPhase-locked loop(PLL)▼aJitter control loop(JCL)▼aOn-chip jitter monitor circuit(JMC)▼aNoise and power reconfigurable ring voltage controlled oscillator(VCO)