Browse "College of Engineering(공과대학)" by Author Jung, Jinwook
Showing results 1 to 21 of 21
| A compact multi-bit flip-flop with smaller height implementation and metal-less clock routing Seo, Jae-Woo; Jung, Jinwook; Shin, Youngsoo, SPIE Advanced Lithography, SPIE, 2018-02-28 |
| A Compact Multi-Bit Flip-Flop with Smaller Height Implementation and Metal-Less Intra-Cell Routing Seo, Jaewoo; Jung, Jinwook; Shin, Youngsoo, Conference on Design-Process-Technology Co-Optimization for Manufacturability XII, SPIE-INT SOC OPTICAL ENGINEERING, 2018-03 |
| Cut optimization for redundant via insertion in self-aligned double patterning Song, Youngsoo; Hyun, Daijoon; Lee, Jingon; Jung, Jinwook; Shin, Youngsoo, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.24, no.6, pp.61:1 - 61:21, 2019-09 |
| Design and optimization of multiple-mesh clock network Shin, Youngsoo; Jung, Jinwook; Lee, Dongsoo, International Conference on Very Large Scale Integration (VLSI-SoC), , pp.171 - 176, IFIP, IEEE, 2014-10 |
| Fast timing analysis of transistor-level full custom digital circuits Lee, Jingon; Jung, Jinwook; Shin, Youngsoo, IEEE International Symposium on Circuits & Systems, Institute of Electrical and Electronics Engineers, 2018-05-27 |
| Incremental placement for timing and routability optimization = 타이밍과 배선 가능성 향상을 위한 점증적 배치기법link Jung, Jinwook; Youngsoo Shin; et al, 한국과학기술원, 2018 |
| Integrated latch placement and cloning for timing optimization Jung, Jinwook; Nam, Gi-Joon; Chung, Woohyun; Shin, Youngsoo, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.24, no.2, pp.22:1 - 22:17, 2019-03 |
| Localized DNA circuit design with majority gates Jung, Jinwook; Shin, Youngsoo, IEEE BioMedical Circuits and Systems Conference (BioCAS), pp.172 - 175, IEEE, 2016-10-17 |
| NIRS-SPM: Statistical parametric mapping for near-infrared spectroscopy Ye, Jong Chul; Tak, Sungho; Jang, Kwang Eun; Jung, Jinwook; Jang, Jaeduck, NEUROIMAGE, v.44, no.2, pp.428 - 447, 2009-01 |
| Optimizing timing margin for timing closure, area, and power Han, In-Hak; Jung, Jinwook; Shin, Youngsoo, 한국반도체학술대회, 대한전자공학회, 2016-02-22 |
| OWARU: free space-aware timing-driven incremental placement Jung, Jinwook; Nam, Gi-Joon; Reddy, Lakshmi; Jiang, Hui-Ru; Shin, Youngsoo, 35th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2016, pp.1 - 8, Institute of Electrical and Electronics Engineers Inc., 2016-11-07 |
| OWARU: free space-aware timing-driven incremental placement with critical path smoothing Jung, Jinwook; Nam, Gijoon; Reddy, Lakshmi; Jiang, Iris Huiru; Shin, Youngsoo, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.37, no.9, pp.1825 - 1838, 2018-09 |
| Pin Accessibility-Driven Cell Layout Redesign and Placement Optimization Seo, Jaewoo; Jung, Jinwook; Kim, Sangmin; Shin, Youngsoo, 54th Annual Design Automation Conference, DAC 2017, pp.1 - 6, Institute of Electrical and Electronics Engineers Inc., 2017-06-20 |
| Redundant via insertion in SADP process with cut merging and optimization SONG, YOUNGSOO; Jung, Jinwook; Shin, Youngsoo, International Conference on Very Large Scale Integration (VLSI-SoC), IFIP, IEEE, 2017-10-24 |
| Redundant via insertion in self-aligned double patterning Song, Youngsoo; Jung, Jinwook; Shin, Youngsoo, Conference on Design-Process-Technology Co-Optimization for Manufacturability XI, SPIE, 2017-03 |
| Redundant via insertion with cut optimization for self-aligned double patterning Song, Youngsoo; Jung, Jinwook; Shin, Youngsoo, 27th Great Lakes Symposium on VLSI, GLSVLSI 2017, pp.137 - 142, Association for Computing Machinery, 2017-05-11 |
| Semiconductor device Shin, Youngsoo; Seo, Jae-Woo; Jung, Jinwook |
| Semiconductor device Seo, Jae-Woo; Shin, Youngsoo; Jung, Jinwook |
| Standard cell layout design and placement optimization for TFET-based circuits SONG, YOUNGSOO; Jung, Jinwook; Shin, Youngsoo, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, Institute of Electrical and Electronics Engineers Inc., 2019-05-26 |
| Timing optimization in SADP process through wire widening and double via insertion SONG, YOUNGSOO; Jung, Jinwook; HYUN, DAIJOON; Shin, Youngsoo, SPIE Advanced Lithography, SPIE, 2018-02-28 |
| Transient clock power estimation of pre-CTS netlist Kwon, Yonghwi; Jung, Jinwook; Han, In-Hak; Shin, Youngsoo, IEEE International Symposium on Circuits & Systems, Institute of Electrical and Electronics Engineers, 2018-05-27 |
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