Browse "College of Engineering(공과대학)" by Author Byun, Sung-Jae
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| Design of gate-level PSG builder for behavioral emulator = 행위 모델 에뮬레이터를 위한 핀 신호 발생기 모듈의 게이트 수준 생성기 구현link Byun, Sung-Jae; 변성재; et al, 한국과학기술원, 2001 |
| FGA : Geometry Acceleration System with VLIW Processor in 3D Graphics Kyung, Chong-Min; Kwon, Young-Su; Lee, Jun-Hee; Im, Yeon-Ho; Byun, Sung-Jae; Jeon, Young-Wook; Nam, Sang-Joon; et al, COOL Chips III, pp.261 - 270, 2000-04 |
| FLOVA: a four-issue VLIW geometry processor with SIMD instructions and lighting acceleration unit Nam, Sang-Joon; Kim, Byoung-Woon; Im, Yeon-Ho; Kwon, Young-Su; Lee, Jun-Hee; Cheon, Young-Wook; Byun, Sung-Jae; et al, CICC 2000: 22nd Annual Custom Integrated Circuits Conference, pp.551 - 554, CICC, 2000-05-21 |
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