Browse "College of Engineering(공과대학)" by Author Kyung, Chong-Min
Showing results 156 to 215 of 565
| C-based RTL design verification methodology for complex microprocessor Yim, JS; Hwang, YH; Park, CJ; Choi, H; Yang, WS; Oh, HS; Park, In-Cheol; et al, Proceedings of the 1997 34th Design Automation Conference, pp.83 - 88, 1997-06-09 |
| CABAC rate estimation for H.264/AVC mode decision = H.264/AVC 모드 결정을 위한 CABAC 비트율 추정 방법link Hahm, Jong-Min; 함종민; et al, 한국과학기술원, 2009 |
| Cache miss aware dynamic stack allocation = 캐쉬 미스를 고려한 동적 스택 할당link Jang, Sung-Joon; 장성준; et al, 한국과학기술원, 2007 |
| Cache miss-aware dynamic stack allocation Jang, S.-J.; Chung, M.-K.; Kim, J.; Kyung, Chong-Min, 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007, pp.3494 - 3497, 123, 2007-05-27 |
| CAD for Microsystems Design Kyung, Chong-Min, KUSDAM, 1993-11 |
| CBLO: A clustering based linear ordering for netlist partitioning Seong, Kwang-Su; Kyung, Chong-Min, Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC, pp.43 - 48, 1997-01-28 |
| CeRA: A router for symmetrical FPGAs based on exact routing density evaluation Eum, NW; Kim, T; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTERS, v.53, pp.829 - 842, 2004-07 |
| Channel routine Using 0-1 Quadratic Integer Programming Kyung, Chong-Min; Lee, P.H., JTC-CSCC, 1992-07 |
| Characterization and real-time correction for non-uniformity of TEC-less bolometer FPA = 무-열전냉각소자 볼로미터 초점면배열의 비-균일성에 대한 특성 분석 및 실시간 보정link Lee, Jung-Eon; 이중언; et al, 한국과학기술원, 2013 |
| Characterization of impurity profile in silicon = 실리콘에서 불순물 분포의 산출link Yang, Yeong-Yil; 양영일; et al, 한국과학기술원, 1985 |
| Characterization of non-uniformity and bias-heating for uncooled bolometer FPA detectors using simulator Kyung, Chong-Min; Jungeon Lee, SPIE Conference and Exhibitions, SPIE Conference and Exhibitions, 2013-04-29 |
| Characterization of one-dimensional impurity profile in silicon using iterative parabolic solver = 수치해석 프로그램을 이용한 실리콘에서의 일차원적 불순물 분포의 산출link Oh, Hyeong-Cheol; 오형철; et al, 한국과학기술원, 1984 |
| Characterization of Two-Dimensional Impurity Profile in Semiconductor Using Direct Solution Method Kyung, Chong-Min; Yang, Y.Y.; Oh, H.C., 1984 International Electronic Devices and Materials Symposium, pp.213 - 218, 1984-09 |
| Charge-Coupled A/D Converter Kim, Choong Ki; Kyung, Chong-Min, IEEE Custom Integrated Circuits Conference, pp.94 - 98, 1981-05 |
| CHARGE-COUPLED ANALOG-TO-DIGITAL CONVERTER Kyung, Chong-Min; Kim, Choong Ki, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.16, no.6, pp.621 - 626, 1981 |
| Circuit block placement using simulated annealing = 시뮬레이티드 어닐링을 이용한 회로블락의 배치link Park, In-Chul; 박인철; et al, 한국과학기술원, 1988 |
| Circuit extraction from MOS/LSI mask layout = 집적회로 마스크 도면으로 부터 회로 추출link Kim, Sung-Soo; 김성수; et al, 한국과학기술원, 1986 |
| Circuit Placement in arbitrary-Shaped Region Using Self-Organization Kyung, Chong-Min; Kim, S.S., International Symposium on Circuits and Systems, 1989-05 |
| Circuit Placement in Rectilinear Region Using Simulated Annealing and Self-Organization Park, In-Cheol; Kyung, Chong-Min, 1988 International Computer Symposium, 1988-12 |
| CIRCUIT PLACEMENT ON ARBITRARILY SHAPED REGIONS USING THE SELF-ORGANIZATION PRINCIPLE KIM, SS; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.11, no.7, pp.844 - 854, 1992-07 |
| CLASSIC: An O(n(2))-heuristic algorithm for microcode bit optimization based on incompleteness relations Choi, YD; Park, In-Cheol; Kyung, Chong-Min, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E83A, no.5, pp.901 - 908, 2000-05 |
| CMOS Latch-Up 현상의 실험적 해석 = Experimental analysis of CMOS Latch-Up phenomenalink 고요환; Koh, Yo-Hwan; 김충기; 경종민; et al, 한국과학기술원, 1985 |
| CMOS 표준 셀의 자동 생성 = An automated design of CMOS standard cellslink 김한흥; Kim, Han-Heung; et al, 한국과학기술원, 1986 |
| Co-Development of Media Processor and Source-level Debugger Using Hardware Emulation Kyung, Chong-Min; Kim, B.W.; Kang, K.G.; Nam, S.J.; Im, Y.H.; Chang, S.I., International Conference on Signal Processing Application and Technology(ICSPAT), 1999-11 |
| Co-development of Media-processor and Source-level Debugger using Emulation-based Validation Kyung, Chong-Min; Im, Y.H.; Nam, S.J.; Kim, B.W.; Kang, K.G.; Lee, D.H.; Yang, J.H.; et al, International Conference on VLSI and CAD(ICVC'99), pp.95 - 98, 1999-10 |
| Code Generation for Embedded Processors with Complex Instructions Lee, J.Y.; Yoon, H.D.; Park, In-Cheol; Yang, J.H.; Kyung, Chong-Min, International Conference on VLSI and CAD(ICVC'99), pp.525 - 528, 1999-10 |
| COFACTOR PACKING ALGORITHM FOR LOOKUP-TABLE BASED FIELD-PROGRAMMABLE GATE ARRAYS PARK, SS; LEE, YH; HWANG, SH; Kyung, Chong-Min, ELECTRONICS LETTERS, v.30, no.15, pp.1207 - 1209, 1994-07 |
| Color reproduction pipeline for an RGBW CFA sensor = RGBW CFA 센서를 위한 색 재현 파이프라인link Choi, Wonseok; Ro, Yong Man; 노용만; Kyung, Chong-Min; et al, 한국과학기술원, 2021 |
| Communication-efficient hardware acceleration for fast functional simulation Kim, Y.-I.; Yang, W.; Kwon, Y.-S.; Kyung, Chong-Min, Proceedings of the 41st Design Automation Conference, pp.293 - 298, 2004-06-07 |
| Communication-efficient hardware acceleration for fast functional simulation = 고속 시뮬레이션을 위한 효율적인 하드웨어 가속 방법link Kim, Young-Il; 김영일; et al, 한국과학기술원, 2005 |
| Concurrent Design Methodology for GRIMDOL Microprocessor System Kyung, Chong-Min, International Conference on VLSI and CAD, 1993-11 |
| Conforming block inversion for low power memory Chang, YS; Kyung, Chong-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.10, no.1, pp.15 - 19, 2002-02 |
| Conforming Inverted Data Store for Low Power Memory Kyung, Chong-Min; Chang, Y.S.; Park, B.I., International Symposium on Low Power Electronics and Design(ISLPED'99), pp.91 - 93, 1999-08 |
| CONSCEP: A CONfigurable SoC Emulation Platform for C-based fast prototyping Yang, W; Kyung, Chong-Min, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.14, pp.137 - 157, 2005-02 |
| Content Switching Network Processor and Scalable Switch Fabric for Gigabit Ethernet(Best Paper Award-Samsung) Kyung, Chong-Min; Chang, You-Sung; Yi, Ju-Hwan; Oh, Hun-Seung; Lee, Seung-Wang; Kang, Moo-Kyung; Chun, Jung-Bum; et al, 2003 SoC Design Conference(SDC), pp.854 - 859, 2003 |
| Control signal layout ordering scheme minimising cross-coupling effect in deep-submicrometre datapath design Yim, JS; Kyung, Chong-Min, ELECTRONICS LETTERS, v.35, no.18, pp.1542 - 1543, 1999-09 |
| Cost-effective TSV Redundancy Configuration Jung, Jongpil; Kyung, Chong-Min; Yoon, Youngjun; Lee, Jae-Jin; Kang, Kyungsu, IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), pp.263 - 266, IEEE Computer Society, 2012-10-08 |
| CPU 설계를 위한 PC 환경 모델의 구현 = An implementation of PC environment model for CPU designlink 이승종; Lee, Seung-Jong; et al, 한국과학기술원, 1995 |
| CSG방식을 기초로한 3차원 입체 설계 시스템의 개발 = Development of the CSG-based solid modeling systemlink 박기현; Park, Kee-Hyun; et al, 한국과학기술원, 1989 |
| Current Status and Challenges of SoC Verification for Embedded Systems Market Kyung, Chong-Min; Yang, Wooseung; Chung, Moo-Kyeong, IEEE International SOC Conference, pp.213 - 216, 2003-09 |
| Customization of a CISC processor core for low-power applications Chang, Y.S.; Park, B.I.; Park, In-Cheol; Kyung, Chong-Min, ICCD'99(International Conference on Computer Design), pp.152 - 157, 1999-10 |
| Customization of embedded system for low-power application = 저전력 어플리케이션을 위한 임베디드 시스템의 최적화link Chang, You-Sung; 장유성; et al, 한국과학기술원, 2001 |
| Cycle-Accurate Co-Emulation with SystemC Kyung, Chong-Min; Ki, Ando; Park, Bong-Il; Lee, Jae-Gon, 2003 SoC Design Conference(SDC), pp.688 - 691, 2003 |
| Cycle-accurate verification of AHB-based RTL IP with transaction-level system environment Shim, H.; Lee, S.-H.; Woo, Y.-S.; Chung, M.-K.; Lee, J.-G.; Kyung, Chong-Min, 2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006, pp.135 - 138, 2007-04-26 |
| Data reuse algorithm for multiple reference frame motion estimation Shim, H; Kyung, Chong-Min, ELECTRONICS LETTERS, v.43, pp.382 - 383, 2007-03 |
| Data Reuse Method between Heterogeneous Partitions (DRHP) in H.264/AVC motion compensator Kim, S.; Shim, H.; Kyung, Chong-Min, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp.3506 - 3509, 123, 2008-05-18 |
| Datapath layout compiler using bit-wise cell-sizing scheme for delay balancing and power minimisation Yim, JS; Kyung, Chong-Min, ELECTRONICS LETTERS, v.35, no.21, pp.1788 - 1789, 1999-10 |
| Datapath layout optimisation using genetic algorithm and simulated annealing Yim, JS; Kyung, Chong-Min, IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, v.145, no.2, pp.135 - 141, 1998-03 |
| Depth and image sensing system with offset pixels: its hardware accelerator and focus-diversity system = 오프셋 화소를 활용한 영상 및 깊이 정보 추출: 하드웨어 가속기와 다초점 시스템에의 응용link Kim, Young-Gyu; Park, In-Cheol; 박인철; Kyung, Chong-Min; et al, 한국과학기술원, 2021 |
| Depth extraction using adaptive blur channel selection for dual aperture camera Kim, Kyungho; Lee, Yeongmin; Park, Hyun Sang; Kyung, Chong-Min, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, pp.198 - 201, Institute of Electrical and Electronics Engineers Inc., 2016-10 |
| Depth extraction using adaptive blur channel selection for dual-aperture camera = 이중 조리개 카메라에서 적응적 블러 채널 선택을 이용한 깊이 추출 방법link Kim, Kyungho; 김경호; et al, 한국과학기술원, 2016 |
Depth extraction with offset pixels Yun, W. J.; Kim, Y. G.; Lee, Y. M.; Lim, J. Y.; Km, H. J.; Khan, M. U. K.; Chang, S.; et al, OPTICS EXPRESS, v.26, no.12, pp.15825 - 15841, 2018-06 |
| Depth information propagation direction algorithm for regularization = 정규화를 위한 깊이 정보 전파 방향 알고리즘link Shin, Sungyun; 신성윤; et al, 한국과학기술원, 2016 |
| Depth refinement on sparse-depth images using visual perception cues Khan, Muhammad Umar Karim; Khan, Asim; Kyung, Chong-Min, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, pp.440 - 443, Institute of Electrical and Electronics Engineers Inc., 2016-10 |
| Design and Implementation of an Indoor Ambient Noise Monitoring System with Localization Son, Junho; Cho, Hyuntae; Kyung, Chong-Min, 10th IEEE Annual Ubiquitous Computing, Electronics and Mobile Communication Conference, UEMCON 2019, pp.0824 - 0829, Institute of Electrical and Electronics Engineers Inc., 2019-10 |
| Design and Implementation of Content Switching Network Processor and Scalable Switch Fabric you-sung chang; ju-hwang yi; hun-seung oh; seung-wang lee; moo-kyung kang; jung-bum chun; jun-hee lee; et al, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.3, no.3, pp.167 - 174, 2004-12 |
| Design and Implementation of Practical Step Detection Algorithm for Wrist-Worn Devices 조연훈; Cho, Hyuntae; Kyung, Chong-Min, IEEE SENSORS JOURNAL, v.16, no.21, pp.7720 - 7730, 2016-11 |
| Design and management of 3D-stacked NUCA cache for chip multiprocessors Jung, J.; Kang, K.; Kyung, Chong-Min, 21st Great Lakes Symposium on VLSI, GLSVLSI 2011, pp.91 - 96, ACM, 2011-05-02 |
| Design of a low power MP3 decoder = 저전력 MP3 복호화기의 설계link Yi, Yong-Seok; 이용석; Park, In-Cheol; Kyung, Chong-Min; et al, 한국과학기술원, 2001 |
| Design of cache controller and bus unit for K486 microprocessor = K486 마이크로프로세서-내부 캐쉬 콘트롤러 및 버스 유닛 설계link Yim, Joon-Seo; 임준서; et al, 한국과학기술원, 1993 |
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