Showing results 1 to 2 of 2
3.2Gbps multi-channel clock and data recovery circuit for chip-to-chip optical linkslink Ngo Trong Hieu; Park, Hyo-Hoon; et al, 한국정보통신대학교, 2007 |
Design of a half-rate phase detector using MOS current-mode logic gates for 10-Gbit/s clock and data recovery = MOS current-mode logic (MCML) gate를 이용한 10-Gbit/s CDR용 half-rate 위상검출기의 설계에 관한 연구link Shin, Jong-Kil; 신종길; et al, 한국정보통신대학교, 2005 |