Design of a half-rate phase detector using MOS current-mode logic gates for 10-Gbit/s clock and data recoveryMOS current-mode logic (MCML) gate를 이용한 10-Gbit/s CDR용 half-rate 위상검출기의 설계에 관한 연구

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Advisors
Lee, Man-Seopresearcher이만섭researcher
Description
한국정보통신대학교 : 공학부,
Publisher
한국정보통신대학교
Issue Date
2005
Identifier
392566/225023 / 020034546
Language
eng
Description

학위논문(석사) - 한국정보통신대학교 : 공학부, 2005, [ viii, 59 p. ]

Keywords

MOS; Phase Detector; Half-Rate; Design; Current-Mode Logic; 위상검출기; 설계; Clock and Data Recovery; 10-Gbit/s; Gate

URI
http://hdl.handle.net/10203/55409
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=392566&flag=dissertation
Appears in Collection
School of Engineering-Theses_Master(공학부 석사논문)
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