Browse "EE-Journal Papers(저널논문)" by Subject leakage current
Showing results 1 to 8 of 8
| Dual-Mode Operations of Self-Rectifying Ferroelectric Tunnel Junction Crosspoint Array for High-Density Integration of IoT Devices Lim, Sehee; Goh, Youngin; Lee, Young Kyu; Ko, Dong Han; Hwang, Junghyeon; Jeong, Yeongseok; Shin, Hunbeom; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.7, pp.1860 - 1870, 2023-07 |
| Effect of Off-state Stress on Gate-Induced Drain Leakage by Interface Traps in Buried-Gate FETs Lee, Geon-Beom; Kim, Choong-Ki; Yoo, Min-Soo; Hur, Jae; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.66, no.12, pp.5126 - 5132, 2019-11 |
| Minimizing Leakage Power of Sequential Circuits through Mixed-V-t Flip-Flops and Multi-V-t Combinational Gates Kim, Jaehyun; Oh, Chungki; Shin, Youngsoo, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.15, no.1, 2009-12 |
| Multi-layer high-kappa interpoly dielectric for floating gate flash memory devices Zhang, L; He, W; Chan, DSH; Cho, Byung Jin, SOLID-STATE ELECTRONICS, v.52, pp.564 - 570, 2008-04 |
| Power Gating: Circuits, Design Methodologies, and Best Practice for Standard-Cell VLSI Designs Shin, Young-Soo; Seomun, Jun; Choi, Kyu-Myung; Sakurai, Takayasu, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.15, no.4, 2010-09 |
| Reduction of radiation-induced leakage currents in thin oxides by application of a low post-irradiation gate bias Ang, CH; Ling, CH; Cheng, ZY; Kim, SJ; Cho, Byung Jin, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, v.39, no.7B, pp.757 - 759, 2000-07 |
| Skewed Flip-Flop and Mixed-V-t Gates for Minimizing Leakage in Sequential Circuits Seomun, Jun; Kim, Jae-Hyun; Shin, Young-Soo, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.27, pp.1956 - 1968, 2008-11 |
| Stacked-FET linear SOI CMOS SPDT antenna switch with input P1 dB greater than 40 dBm Im, Dong-Gu; Lee, Kwy-Ro, IEICE ELECTRONICS EXPRESS, v.9, no.24, pp.1813 - 1822, 2012-12 |
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