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A 7–8.5 GHz LC Voltage-Controlled Oscillator with –111.7 dBc/Hz Phase Noise at 1-MHz offset for Ultra-Low-Jitter Phase-Locked Loop 조용우; 채문재; 최재혁, IDEC Journal of Integrated Circuits and Systems, v.9, no.1, pp.1 - 5, 2023-01 |
Design of a 12 to 14.5 GHz Digitally-Controlled Oscillator for an Ultra-Low-Jitter PLL 방주은; 조용우; 최서진; 최재혁, IDEC Journal of Integrated Circuits and Systems, v.7, no.1, pp.18 - 23, 2021-01 |
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