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Results 1-10 of 17 (Search time: 0.005 seconds).

NO Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date)
1
Power and Signal Integrity Analysis of Fan-out Wafer Level Package for Mobile Application Processor

Kim, Joungho; Kim, Youngwoo; Cho, Kyungjun; Park, Gapyeol; Kim, Subin; Kang, Kibum; So, Kwangsup; Jeon, Jiwon; Kim, Chungju; Paik, Woohyun, DesignCon 2017, DesignCon 2017, 2017-01-31

2
Design and analysis of high bandwidth memory (HBM) interposer Considering Signal and Power integirty (SI/PI) for terabyte/s bandwidth system

Kim, Joungho; Cho, Kyungjun; Lee, Hyunsuk; Kim, Heegon; Kim, Youngwoo; Choi, Sumin; Kim, Subin; Kim, Hyungsoo, DesignCon 2017, DesignCon 2017, 2017-02-01

3
Hierarchical Power Distribution Network Design in Fanout Wafer Level Package based Mobile AP-GPU for Multi-Media System

Kim, Joungho; Kim, Youngwoo; Cho, Kyungjun; Park, Gapyeol; Kim, Subin, 2017 Asia-Pacific International Symposium on Electromagnetic Compatibility, 2017 Asia-Pacific International Symposium on Electromagnetic Compatibility, 2017-06-22

4
Design and Analysis of Interposer-level Integrated Voltage Regulator for Power Noise Suppression in High Bandwidth Memory I/O Interface

Kim, Subin; Kim, Youngwoo; Cho, Kyungjun; Song, Jinwook; Park, Shinyoung; Park, Junyong; Park, Hyunwook; Jeong, Seungtaek; Kim, Joungho, 27th IEEE Conference on Electrical Performance on Electronic Packaging and Systems (EPEPS), pp.159 - 161, IEEE, 2018-10-15

5
Reinforcement Learning-based Optimal On-board Decoupling Capacitor Design Method

Park, Hyunwook; Park, Junyong; Kim, Subin; Lho, Daehwan; Park, Shinyoung; Park, Gapyeol; Cho, Kyungjun; Kim, Joungho, 27th IEEE Conference on Electrical Performance on Electronic Packaging and Systems (EPEPS), pp.213 - 215, IEEE, 2018-10-15

6
Bias-dependent Power Distribution Network Impedance Analysis with MOS Capacitor

Kim, Dong-Hyun; Kim, Subin; Park, Junyong; Kim, Youngwoo; Choi, Sumin; Cho, Kyungjun; Kim, Joungho, 2018 Joint Institute of Electrical and Electronics Engineers Eletromagnetic Compatibility (EMC) & Asia-Pacific international symposium on Eletromagnetic Compatibility (APEMC), pp.40 - 40, IEEE EMC & APEMC, 2018-05-16

7
Modeling and Signal Integrity Analysis of 3D XPoint Memory Cells and Interconnections with Memory Size Variations During Read Operation

Son, Kyungjune; Cho, Kyungjun; Kim, Subin; Park, Gapyeol; Song, Kyunghwan; Kim, Joungho, 2018 IEEE Symposium on Electromagnetic Compatibility, Signal & Power Integrity, pp.223 - 227, 2018 IEEE Symposium on Electromagnetic Compatibility, Signal & Power Integrity, 2018-08-01

8
Signal and Power Integrity (SI/PI) Analysis of Heterogeneous Integration Using Embedded Multi-die Interconnect Bridge (EMIB) Technology for High Bandwidth Memory (HBM)

Kim, Joungho; Cho, Kyungjun; Lee, Hyunsuk; Park, Gapyeol; Kim, Subin; Son, Kyungjune; Choi, Sumin, 2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2017-12-16

9
Design methodology of passive equalizer for GDDR6 memory test

Kim, Subin; Kim, Seongguk; Kim, Hyesoo; Cho, Kyungjun; Kim, Joungho, 2019 Joint International Symposium on Electromagnetic Compatibility, Sapporo and Asia-Pacific International Symposium on Electromagnetic Compatibility, EMC Sapporo/APEMC 2019, pp.270 - 273, Institute of Electrical and Electronics Engineers Inc., 2019-06

10
Power Distribution Network (PDN) Design and Analysis of A Single and. Double-Sided High Bandwidth Memory (HBM) Interposer for 2.5D Terabtye/s Bandwidth System

Cho, Kyungjun; Kim, Joungho; Kim, Youngwoo; Kim, Subin; Lee, Hyunsuk; Choi, Sumin; Kim, Heegon, IEEE International Conference on Signal and Power Integrity (SIPI 2016), IEEE International Conference on Signal and Power Integrity (SIPI 2016), 2016-07-27

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