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A 3.9 mu W, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS Jeon, Hyuntak; Bang, Jun-Suk; Jung, Yoontae; Lee, Taeju; Jeon, Yeseul; Koh, Seok-Tae; Choi, Jaesuk; et al, IEEE Asian Solid-State Circuits Conference (A-SSCC), pp.91 - 92, IEEE, 2018-11 |
A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS Jeon, Hyuntak; Bang, Jun-Suk; Jung, Yoontae; Lee, Taeju; Jeon, Yeseul; Koh, Seok-Tae; Choi, Jaeseok; et al, IEEE Asian Solid-State Circuits Conference, IEEE, 2018-11-07 |
A Neural Recording Amplifier Based on Adaptive SNR Optimization Technique for Long-Term Implantation Lee, Taeju; Jang, Doojin; Jung, Yoontae; Jeon, Hyuntak; Hong, Soonyoung; Han, Sungmin; Chu, Jun-Uk; et al, IEEE Biomedical Circuits and Systems Conference, pp.1 - 4, IEEE, 2017-10-20 |
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