A 3.9 mu W, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS

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This paper presents a 5-bit VCO-based neural recording IC, which directly quantizes the input signal and achieves a large dynamic range (DR) to process the small-amplitude neural signal in the presence of the large-amplitude stimulation artifact (SA). A feedback-controlled source degeneration is applied to the input transconductor circuit (Oxon) by using a resistor DAC (R-DAC). It mitigates the circuit nonlinearity, resulting in a large signal-to-noise-and-distortion ratio (SNDR) and a high input impedance (Zai). The implemented neural recording IC achieves 81.3dB SNDR over 2001z signal bandwidth and 200mNpp maximum allowable input range while consuming 3.9p..'W per channel.
Publisher
IEEE
Issue Date
2018-11
Language
English
Citation

IEEE Asian Solid-State Circuits Conference (A-SSCC), pp.91 - 92

DOI
10.1109/ASSCC.2018.8579284
URI
http://hdl.handle.net/10203/274829
Appears in Collection
EE-Conference Papers(학술회의논문)
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