Browse "EE-Conference Papers(학술회의논문)" by Author Sung, BRS
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| A 21fJ/conv-step 9 ENOB 1.6GS/s 2x Time-Interleaved FATI SAR ADC with Background Offset and Timing-Skew Calibration in 45nm CMOS Sung, BRS; Jo, DS; Jang, IH; Lee, DS; You, YS; Lee, YH; Park, HJ; et al, International Solid-State Circuits Conference (ISSCC), IEEE, 2015-02-25 |
| A 6 bit 2 GS/s flash-assisted time-interleaved (FATI) SAR ADC with background offset calibration Sung, BRS; Lee, CK; Kim, W; Kim, JI; Hong, HK; Oh, GG; Lee, CH; et al, 2013 IEEE Asian Solid-State Circuits Conference, pp.281 - 284, IEEE, 2013-11-13 |
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