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A 6 bit 2 GS/s flash-assisted time-interleaved (FATI) SAR ADC with background offset calibration

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Sung, BRS / Lee, CK / Kim, W / Kim, JI / Hong, HK / Oh, GG / Lee, CH / Choi, M / Park, HJ / Ryu, Seung-Takresearcher
Publisher
IEEE
Issue Date
2013-11-13
Language
English
Citation

2013 IEEE Asian Solid-State Circuits Conference, pp.281 - 284

DOI
10.1109/ASSCC.2013.6691037
URI
http://hdl.handle.net/10203/188170
Appears in Collection
EE-Conference Papers(학술회의논문)
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