Browse "EE-Conference Papers(학술회의논문)" by Title
Showing results 10601 to 10620 of 22891
| Implementation of FPGA based undersampling receiver Singh, Ashish Kumar; 박성욱; MINZ, LAXMIKANT, 2022 정보통신설비 하계학술대회, 사단법인 한국정보통신설비학회, 2022-08-25 |
| Implementation of Friendship in the Emotional Model for Familiarity to Human Choi, Tae-Yong; Jin, Shanshan; Lee, Ju-Jang, IEEE International Symposium on Industrial Electronics 2005, ISIE 2005, pp.1605 - 1610, IEEE, 2005-06-20 |
| Implementation of Generator for Various Area-efficient High-performance Reed-Solomon Decoders 유호영; 이영주; 박인철, 대한전자공학회 추계학술대회, 대한전자공학회, 2011-11-26 |
| Implementation of GPS spoofing system for commercial GPS receiver Kumar Singh, Ashish; Park, Seong-Ook, 2021년 한국전자파학회 하계종합학술대회, 한국전자파학회, 2021-08-20 |
| Implementation of HF multi-standard RFID transceiver for compact mobile devices Song, H.J.; Yoo, S.S.; Yoo, Hyung Joun, 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010, IEEE, 2010-12-15 |
| Implementation of human-robot VQA interaction system with dynamic memory networks Cho, Sanghyun; Kim, Jong-Hwan; Lee, Won-Hyong, 2017 IEEE International Conference on Systems, Man, and Cybernetics, SMC 2017, pp.495 - 500, IEEE Systems, Man, and Cybernetics Society, 2017-10 |
| Implementation of Impedance Controller for Redundant Robot Manipulators Using Extended Exponential Coordinates 이상훈; 정진영; 김민준, 제 37회 제어로봇시스템학회, ICROS, 2022-06-22 |
| Implementation of internet-based personal robot with internet control architecture Han, K.-H.; Kim, S.; Kim, Y.-J.; Lee, S.-E.; Kim, Jong-Hwan, 2001IEEE International Conference on Robotics and Automation (ICRA), pp.217 - 222, IEEE, 2001-05-21 |
| Implementation of low complexity and high throughput sphere decoder Lee J.; Kim H.-S.; Park, Sin Chong, 5th IASTED Asian Conference on Communication Systems and Networks, AsiaCSN 2008, pp.115 - 119, 2008-04-02 |
| Implementation of low jitter clock distribution using chip-package hybrid interconnection Ryu, C.; Chung, D.; Bae, K.; Yu, J.; Kim, Joungho, IEEE 13th Topical Meeting on Electrical Performance of Electronic Packaging, pp.291 - 294, IEEE, 2004-10-25 |
| Implementation of Memory-Centric NoC for 81.6 GOPS object recognition processor Kim, Donghyun; Kim, Kwanho; Kim, Joo-Young; Lee, Seungjin; Yoo, Hoi-Jun, 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC, pp.47 - 50, IEEE, 2007-11-12 |
| Implementation of monitoring mechanism for MPLS networks Song, H.-W.; Jung, I.; Choi, JunKyun; Youn, ChanHyun; Ryu, H.-Y.; Yang, S.-H., 6th International Conference on Advanced Communication Technology: Broadband Convergence Network Infrastructure, v.2, pp.868 - 872, 2004-02-09 |
| Implementation of MPEG-2 encoder to multiprocessor system using multiple MVPs (TMS320C80) Kim, HyungSun; Boo, Kenny; Chung, SeokWoo; Choi, Geon Y.; Lee, YongJin; Jeon, JaeHo; Park, HyunWook, Medical Imaging 1997: Image Display, v.3031, pp.780 - 789, 1997-02-23 |
| Implementation of multicast network for video signal based on WDM-PON with an injection-locked F-P LD Park, K.J.; Lee, H.K.; Lee, H.J.; Lee, Chang-Hee, 9th International Conference on Optical Internet, COIN 2010, 2010-07-11 |
| Implementation of Neural Networks Using Quantum Well Based Excitionic Devices-Device Requirement Studies Hong, Songcheol; Singh, J; Sahai, R; Bhattacharya, PK, Proceeding of IEEE International conference on Neural Network, pp.411 - 411, 1988 |
| Implementation of Nonlinear Two-mass Vocal Folds Digital Model Lee, H.S.; Chung, Myung Jin, KIEE/IEEK 2004 Conference on Information and Control Systems, pp.9 - 11, KIEE/IEEK, 2004-11-12 |
| Implementation of on-chip and on-package reactive equalizer to minimize inter-symbol interference (ISI) and jitter from frequency dependent attenuation Ahn, Seungyoung; Chun, Jongtae; Kim, Joungho, IEEE International Symposium on Electromagnetic Compatibility, EMC 2007, pp.1 - 6, 2007-07-09 |
| Implementation of parallel DSS for cell-based ATM physical layer Kim, YS; Choi, SI; Park, Hong-Shik, ICC'94, pp.1359 - 1363, IEEE, 1994-05 |
| Implementation of Prefetch Unit Capable of Branch Prediction for RISC Processor 김창현; 박인철, 대한전자공학회 추계학술대회, 대한전자공학회, 2011-11-26 |
| Implementation of pulsed-latch and pulsed-register circuits to minimize clocking power Paik, S; Nam, GJ; Shin, Youngsoo, International Conference on Computer-Aided Design (ICCAD), pp.640 - 646, IEEE/ACM, 2011-11-09 |
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