(An) experimental simulator for AND/OR process modelAND/OR 프로세스 모델의 실험적 모의수행

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There have been proposed many models for parallel execution of logic programs. Among them, the most natural model for parallel execution of logic programs is the AND/OR process model. An experimental simulator is designed which is based on Conery``s AND/OR process model. But, recently, it is proved that this backtracking scheme is not correct by several researchers. In this thesis, Lin``s scheme for intelligent backtracking is implemented on the experimental simulator. The simulator is written in CPROLOG 1.5 language. It divides a logic program by set of of processes and performs transitions of processes by reading messages. Behaviors of the simulator is not parallel because of current PROLOG. The simulator shows the degree of parallelism where AND and OR parallelisms are exploited to solve logic programs.
Advisors
Park, Kyu-Horesearcher박규호researcher
Description
한국과학기술원 : 전기 및 전자공학과,
Publisher
한국과학기술원
Issue Date
1987
Identifier
65729/325007 / 000851078
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1987.2, [ [iii], 87 p. ]

URI
http://hdl.handle.net/10203/38994
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=65729&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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