(A) spread spectrum clock generator with a voltage reference and a process variation compensator

Abstract

As the physical size, the resolution size, and color depth of FPDs increase, a requirement for the wide bandwidth of display interfaces is rapidly increased to send visual data to flat panel displays. To support the wide bandwidth of display interfaces, the high speed serialized data transmission should be introduced. However, these clock-synchronized high speed interfaces have the electromagnetic interference (EMI) problem which reduces the reliability of transferred data. This thesis presents the spread spectrum clock generator which reduces EMI. The proposed spread spectrum clock generator consists of a basic PLL, the process variation compensator, the frequency modulator, and voltage reference. The process variation compensator and voltage reference are proposed to suppress and compensate process, supply voltage, and temperature (PVT) variations and to guarantee the accuracy of the frequency modulation. The proposed spread spectrum clock generator is fabricated in 0.18 μm CMOS. The output clock frequency of the proposed clock generator is 10-phase 270 MHz and 162 MHz frequency is also supported. A phase noise of the proposed clock generator is -67.5 dBc/Hz at 45 kHz in 270MHz mode and -72 dBc/Hz at 30 kHz in 162MHz mode. This circuit uses the triangular wave as the modulation profile and 0.45% spread ratio is achieved. The modulation frequency is 30 kHz. The maximum voltage variation of the proposed voltage reference is 6.5 mV as the temperature changes from $25^\cric C$ to $110^\circ C$. The power supply rejection ratio of the proposed voltage reference is -44.5 dB at 1 kHz. The power dissipation of the proposed spread spectrum clock generator except for output buffers is 30 mW at 270 MHz with 1.8 V supply and of the proposed voltage reference is 12μW at $25^\circ C$. The active area of the spread spectrum clock generator is 1900 μm X 960 μm and of the voltage reference is 90 μm X 100 μm.