(A) reduced clock swing dual edge triggered flip-flop

Abstract

As the mobile systems such as notebook, cellular phone, PDAs gets popular recently, the concern over the low power consumption digital systems gets larger than before. Therefore, the digital circuit design methodology which enables less power consumption is inevitable in recent electronic circuit industry. Especially, owing to the intrinsic characteristic of the clock signal, the power consumption on the clock distribution network and flip-flop are one of the key factors for the low power VLSI system. The switching activation probability of the clock signal is 100% whereas the probability of the ordinary logic part is 30%-40% at average. In addition, as the pipeline gets deeper and bit-width of the internal data gets wider to obtain high performance in mobile system, the number of the flip-flops used in the pipeline increases. Therefore the clock load capacitance increase. This also contributes the overall power consumption of the digital VLSI system. To solve these problems, a novel flip-flop is proposed in this paper, where it merges the low swing voltage of the clock scheme and the dual edge triggering scheme together without any special process requirement. The proposed flip-flop samples the input data at not only rising edge but also falling edge of the clock signal with reduced clock swing voltage. Moreover, the proposed flip-flop is implemented with nominal single threshold voltage CMOS process so that it can be compatible with other logic part and it does not require any process overhead. In addition, the proposed flip-flop partially accepted the advantage of the latch based pipeline system. As the clock frequency increase to get high performance operation, the clock skew and jitter in the clock distribution network are becoming important issues due to the short timing margin between clock edges. However, the latch based pipeline system is less sensitive to the clock edge variation since the latch is basically level based memory element. In other words...