(A) unified current - voltage modeling for deep submicron CMOS FETs

Abstract

New semi-empirical current-voltage models for long-channel and shorechannel NMOS and PMOS, called the AIM (Automatic Integrated circuits Modeling) SPICE models, are proposed. They are based on UCCM (Unified Charge Control Model), UMM (Universal Mobility Model), more accurate velocity-field relationships for NMOS and PMOS, respectively, and new formulation of the finite drain conductance due to channel length modulation effect and DIBL (Drain Induced Barrier Lowering) in the saturation region, and short-channel effects. The salient feature of our models is that it allows the automatic parameter extraction in a systematic and unified manner, which is extremely versatile for statestical circuit simulation, statistical yield analysis due to parameter variation, QC (Quality Control) and QA (Quality Assurance). We applied our approaches to submicron n- and p-MOSFETs fabricated by n-well CMOS process. The calculated I-V characteristics using the extracted parameters show excellent agreement with the measurement results. Our parameter extraction is easy and straightforward, and the extracted parameter values such as saturation velocity and characteristic length for channel length modulation are shown to agree well with other independent experimental measurements. These models are implemented in a SPICE version 3C.1, running in a Solbourne series V-602 workstation. The circuit simulation results of AIM SPICE models with similar accuracy. This result is thought to be obtained by the better continuity of drain current and its derivative for the entire MOSFET operation regions.