Constructive deep reinforcement learning (DRL)-based hybrid equalizer design for next generation high bandwidth memory (HBM)

Abstract

In this thesis, we proposed constructive deep reinforcement learning (DRL)-based hybrid equalizer design for next generation high bandwidth memory (HBM). The hybrid equalizer was configured with a passive equalizer as high-pass-filter and active equalizer for high frequency boosting. We used the constructive reinforcement learning for optimization of hybrid equalizer parameters, and the neural network was trained to suggest the optimal hybrid equalizer design for an arbitrary channel dimension. By using domain knowledge about the equalizer circuit, we set the range of parameters that can be designed. Therefore, we improved the optimization and learning efficiency of training by excluding the meaningless data from learning. As well as, we reduced the time cost of reward extraction through channel simulation modeling. For verification of trained neural network, we compared the proposed methodology with conventional optimization method such as genetic algorithm and random search in terms of performance. As a result, we proved that proposed method has optimality and time efficiency.