Proximal policy optimization (PPO) based reinforcement learning model for scalable 3D X-point array structure design considering signal integrity issues신호무결성을 고려한 스케일러블 3차원 크로스포인트 어레이 구조 설계를 위한 근위 정책 최적화 기반 강화학습 모델

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In this paper, we, for the first time, propose a reinforcement-learning model to design an optimal 3D X-Point array structure considering signal integrity issues. The interconnection design problem is modeled to the MDP. The proposed reinforcement-learning model designs the 3D X-Point array structure based on three reward factors: the number of bits, the crosstalk, and the IR drop. We applied multi-layer perceptron and long shot-term memory to parameterize the policy. Proximal policy optimization is used to optimize the parameters to train the policy. The reward of the proposed reinforcement-learning model is well converged with variations of the array structure size and hyperparameters of the reward factors. We verified the scalability and sensitivity of the proposed reinforcement-learning model. With the optimal 3D X-Point array structure design, we analyzed the reward factor and signal integrity issues. The optimal design of the 3D X-Point array structure shows 17 % to 26.5 % better signal integrity performance than the conventional design in finer process technology. In addition, we suggest a range of possible directions for improvement of the proposed model with variations of MDP tuples, reward factors, and learning algorithms, among other factors. Using the proposed model, we can easily design an optimal 3D X-Point array structure with a certain size, performance capabilities and specifications based on reward factors and hyperparameters.
Advisors
Kim, Jounghoresearcher김정호researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2022
Identifier
325007
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학부, 2022.8,[v, 62 p. :]

Keywords

3D X-Point array structure▼aCrosstalk▼aInterconnection▼aIR drop▼aLong-short term memory▼aProximal policy optimization▼aReinforcement learning▼aSignal integrity; 3차원 크로스포인트 어레이 구조▼a누화▼a상호 연결▼a전압 강하▼a장단기메모리▼a근위정책최적화▼a강화학습▼a신호 무결성

URI
http://hdl.handle.net/10203/309077
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1007865&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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