A Near-Memory Radix Sort Accelerator with Parallel 1-bit Sorter

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Sorting is one of the most fundamental operations for many applications. For efficient sorting, data locality can be exploited by processing subdivided data in parallel. This work presents a high-performance and area-efficient near-memory radix sort accelerator where end-to-end sorting is performed locally. With a parallel 1-bit radix sorter, it achieves high throughput by processing multiple keys per cycle. Tested with Xilinx Zynq UltraScale+ ZCU104 FPGA, the experimental result shows up to 10x performance speedup over CPU. It is highly area-efficient and can be integrated into each processing node of a distributed computing system with low area cost.
Publisher
Institute of Electrical and Electronics Engineers Inc.
Issue Date
2022-05
Language
English
Citation

30th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2022

DOI
10.1109/FCCM53951.2022.9786128
URI
http://hdl.handle.net/10203/299729
Appears in Collection
EE-Conference Papers(학술회의논문)
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