A Near-Memory Radix Sort Accelerator with Parallel 1-bit Sorter

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dc.contributor.authorCho, Jihwanko
dc.contributor.authorMaulana, Dalta Imamko
dc.contributor.authorJung, Wanyeongko
dc.date.accessioned2022-11-16T03:02:15Z-
dc.date.available2022-11-16T03:02:15Z-
dc.date.created2022-09-27-
dc.date.created2022-09-27-
dc.date.issued2022-05-
dc.identifier.citation30th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2022-
dc.identifier.urihttp://hdl.handle.net/10203/299729-
dc.description.abstractSorting is one of the most fundamental operations for many applications. For efficient sorting, data locality can be exploited by processing subdivided data in parallel. This work presents a high-performance and area-efficient near-memory radix sort accelerator where end-to-end sorting is performed locally. With a parallel 1-bit radix sorter, it achieves high throughput by processing multiple keys per cycle. Tested with Xilinx Zynq UltraScale+ ZCU104 FPGA, the experimental result shows up to 10x performance speedup over CPU. It is highly area-efficient and can be integrated into each processing node of a distributed computing system with low area cost.-
dc.languageEnglish-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleA Near-Memory Radix Sort Accelerator with Parallel 1-bit Sorter-
dc.typeConference-
dc.identifier.wosid000856347400046-
dc.identifier.scopusid2-s2.0-85133248675-
dc.type.rimsCONF-
dc.citation.publicationname30th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2022-
dc.identifier.conferencecountryUS-
dc.identifier.conferencelocationNew York-
dc.identifier.doi10.1109/FCCM53951.2022.9786128-
dc.contributor.localauthorJung, Wanyeong-
dc.contributor.nonIdAuthorCho, Jihwan-
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EE-Conference Papers(학술회의논문)
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