Reliability Improvement of Gate-All-Around Junctionless SONOS Memory by Joule Heat From Inherent Nanowire Current

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Endurance to cyclic program/erase (P/E) was experimentally improved by Joule heat from inherent nanowire current I-nanowire in a gate-all-around (GAA)-based junctionless (JL) silicon channel (S), tunneling oxide (O), charge trap nitride (N), blocking oxide (O), and poly-silicon gate (S) (SONOS) flash memory. Bulk conduction in the JL structure is favorable to flow I-nanowire across a source and a drain to generate Joule heat for electro-thermal annealing (ETA). Increased temperature ( T ) arising from Joule heat was utilized to cure the damage caused by iterative P/E operations. To quantitatively evaluate the level of induced damage by P/E cycling and cured damage by Joule heat, border trap density (N-bt ) in a tunneling oxide was analyzed through low-frequency noise (LFN) measurements. Stress-induced leakage current (SILC), which is related to bulk trap density ( N-bulk ), was measured and compared before and after ETA. The operation-induced damage was mostly recovered by ETA, which does not require any structural change to drive Joule heat or to make an extra nanoheater.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2022-11
Language
English
Article Type
Article
Citation

IEEE TRANSACTIONS ON ELECTRON DEVICES, v.69, no.11, pp.6133 - 6138

ISSN
0018-9383
DOI
10.1109/TED.2022.3209646
URI
http://hdl.handle.net/10203/299299
Appears in Collection
EE-Journal Papers(저널논문)
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