DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lim, Seung-Yong | ko |
dc.contributor.author | Mabilangan, Raymond | ko |
dc.contributor.author | Chang, Dong-Jin | ko |
dc.contributor.author | Cho, Young-Jae | ko |
dc.contributor.author | Choi, Michael | ko |
dc.contributor.author | Ryu, Seung-Tak | ko |
dc.date.accessioned | 2022-02-24T06:43:25Z | - |
dc.date.available | 2022-02-24T06:43:25Z | - |
dc.date.created | 2022-02-04 | - |
dc.date.created | 2022-02-04 | - |
dc.date.issued | 2021-11-07 | - |
dc.identifier.citation | 17th IEEE Asian Solid-State Circuits Conference (A-SSCC) - Integrated Circuits and Systems for the Connection of Intelligent Things | - |
dc.identifier.uri | http://hdl.handle.net/10203/292387 | - |
dc.description.abstract | Pipelined-SAR ADCs have proved their capability in achieving high-speed and high-resolution with excellent energy-efficiency. The well-known design burden of residue amplifier (RA) such as power-hungry opamp or calibration complexity for inaccurate open-loop amplifier could be eliminated by the single-amplifier dual-residue pipelined architecture which requires neither accurate gain nor gain matching, thereby allowing a calibration-free open-loop RA [1]–[2]. However, the high power consumption of the current-mode interpolation in [1] and the noise-coupling sensitive capacitive interpolation due to the excessive floating capacitors in [2] become additional design issues. For a low-power and noise-coupling-immune structure, this paper proposes a nonbinary capacitive interpolation technique for a single amplifier dual-residue pipelined-SAR ADC. | - |
dc.language | English | - |
dc.publisher | IEEE | - |
dc.title | An Input-buffer Embedding Dual-residue Pipelined-SAR ADC with Nonbinary Capacitive Interpolation | - |
dc.type | Conference | - |
dc.identifier.wosid | 000768220800020 | - |
dc.identifier.scopusid | 2-s2.0-85124000718 | - |
dc.type.rims | CONF | - |
dc.citation.publicationname | 17th IEEE Asian Solid-State Circuits Conference (A-SSCC) - Integrated Circuits and Systems for the Connection of Intelligent Things | - |
dc.identifier.conferencecountry | KO | - |
dc.identifier.conferencelocation | Busan | - |
dc.identifier.doi | 10.1109/a-sscc53895.2021.9634731 | - |
dc.contributor.localauthor | Ryu, Seung-Tak | - |
dc.contributor.nonIdAuthor | Lim, Seung-Yong | - |
dc.contributor.nonIdAuthor | Mabilangan, Raymond | - |
dc.contributor.nonIdAuthor | Chang, Dong-Jin | - |
dc.contributor.nonIdAuthor | Cho, Young-Jae | - |
dc.contributor.nonIdAuthor | Choi, Michael | - |
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