Integrated airgap insertion and layer reassignment for circuit timing optimization회로 타이밍 최적화를 위한 통합 에어갭 삽입 및 레이어 재할당

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Airgap is an intentional void formed in inter-metal dielectric (IMD). It brings about reduced coupling capacitance, and so can be used to improve circuit timing. Airgap can be utilized in a limited number of metal layers due to its high process cost. For given airgap layers, two problems should be addressed to insert airgap: relocate some metal segments in non-airgap layers into airgap layers (called layer reassignment) and determine the amount of airgap for each metal segment in airgap layers (airgap insertion). Two problems are solved together in this dissertation with a goal of maximizing setup total negative slack (TNS) while assuring no hold violations. It is formulated as mixed integer quadratically constrained programming (MIQCP); heuristic algorithm is proposed for practical application and its performance against MIQCP is experimentally assessed using small test circuits. Experiments demonstrate that TNS and WNS are improved by 41% and 10%, respectively, while simple minded approach achieves 13% and 5% less improvements compared to the proposed method.
Advisors
Shin, Youngsooresearcher신영수researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2020
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2020.2,[iv, 33 p. :]

Keywords

Timing optimization▼aairgap inter-metal dielectric▼aairgap layer▼aairgap insertion▼alayer reassignment; 타이밍 최적화▼a에어갭 유전체▼a에어갭 레이어▼a에어갭 삽입▼a레이어 재할당

URI
http://hdl.handle.net/10203/284771
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=911401&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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