79 GHz 4-channel phased array pulse compression radar CMOS front-end IC79 GHz 4-채널 위상 배열 펄스 압축 레이더 CMOS 프론트 엔드 집적회로

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A fully-integrated 79 GHz 4-channel phased array pulse compression radar in a CMOS technology is presented. On the basis of the availability of the ultra-wide bandwidth (UWB) of 4 GHz at the frequency of 79 GHz, pulse compression scheme is adopted to im-plement compact and simple mm-wave radar systems on a die. Pseudo-noise (PN) codes are generated to make phase modulated waveforms and pulse compression scheme is adopted to obtain high spectral density and lower the TX leakage. The length of the PN codes can be changed using a variable-length PN code generator ac-cording to detection distances. For short distances, short-PN codes will be used to reduce TX leakage and, long-PN cods will be used to increase processing gain for long distances. To obtain 2-D information, RF beamforming structure is used and 4-ch phased array re-ceiver is implemented. Each channel consists of a low-noise amplifier (LNA) with noise fig-ure of 7.8 dB, a phase shifter, and a RX buffer. The phase shifter based on digital attenua-tor based vector-sum type has intrinsic variable-gain function. It provides a root-mean-square (RMS) phase error of $6.74^\circ$ with a phase resolution of $11.25^\circ$. The gain dynamic range and resolution are 21 dB and 3 dB, respectively, with a RMS gain error of 1.89 dB. The phase shifter also has high linearity and maintains low phase and gain errors at high in-put powers. There are IQ sub-harmonic mixers, baseband variable-gain amplifiers (VGAs), and correlators after combining signals from each channels. Analog correlation method is adopted to reduce the ADC bandwidth burden which is main problem of UWB phase modulated radar. Total noise figure of the receiver is 12 dB. In digital circuits, there are a clock generator, a delay circuits, and two variable-length PN code generators for RX and TX, respectively. It can generate four-kinds of PRIs (128, 256, 384, and 512-ns), six-kinds of PN codes (3.5, 7.5, 15.5, 31.5, 63.5, and 127.5-ns) and delay steps of 500 psec. Based on the designed 4-channel receiver and digital circuits, transmitter, serial peripheral interface (SPI), and bias circuits are integrated. Finally, the fully-integrated 79 GHz 4-channel phased array pulse compression radar CMOS front-end IC is realized.
Advisors
Hong, Songcheolresearcher홍성철researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2019
Identifier
325007
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학부, 2019.8,[iii, 62 p. :]

Keywords

79 GHz▼aphase modulation▼apseudo noise code▼apulse compression▼aultra-wideband▼aphased array▼aphase shifter▼avariable-gain phase shifter▼aanalog correlation▼aCMOS; 79 GHz▼a위상 변조▼a유사 잡음 코드▼a펄스 압축▼a초광대역▼a위상 배열▼a위상 천이기▼a가변 이득 위상 천이기▼a아날로그 상관기▼aCMOS

URI
http://hdl.handle.net/10203/283303
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=871478&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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