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A Novel Interposer Channel Structure with Vertical Tabbed Vias to Reduce Far-End Crosstalk for Next-Generation High-Bandwidth Memory Kim, Hyunwoong; Lee, Seonghi; Song, Kyunghwan; Shin, Yujun; Park, Dongyrul; Park, Jongcheol; Cho, Jaeyong; et al, MICROMACHINES, v.13, no.7, 2022-07 |
Signal Integrity Analysis of Through-Silicon Via (TSV) With a Silicon Dioxide Well to Reduce Leakage Current for High-Bandwidth Memory Interface Kim, Hyunwoong; Lee, Seonghi; Park, Jongcheol; Shin, Yujun; Woo, Seongho; Kim, Jongwook; Cho, Jaeyong; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.13, no.5, pp.700 - 714, 2023-05 |
Signal Integrity Analysis of Through-Silicon-Via (TSV) with Passive Equalizer to Separate Return Path and Mitigate the Inter-Symbol Interference (ISI) for Next Generation High Bandwidth Memory Kim, HyunWoong; Park, Jongcheol; Lee, Sanguk; Kim, Jongwook; Ahn, Seungyoung, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.13, no.12, pp.1973 - 1988, 2023-12 |
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