Hardware Reduction of MASH Delta-Sigma Modulator Based on Partially Folded Architecture

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This brief presents a new multistage noise-shaping (MASH) structure that has less hardware by applying partially folded architecture. A folded MASH architecture that exploits adders in half is introduced, and the proposed architecture combines the folded MASH architecture and the conventional MASH architecture. The noise power spectrum of the proposed architecture is mathematically analyzed and the noise-shaping capability of the MASH architecture is preserved.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2015-10
Language
English
Article Type
Article
Citation

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.62, no.10, pp.967 - 971

ISSN
1549-7747
DOI
10.1109/TCSII.2015.2458034
URI
http://hdl.handle.net/10203/205281
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