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| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| Bus optimization for low power in high-level synthesis Hong, S; Kim, Taewhan, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.12, pp.1 - 17, 2003-02 | |
| A Complete Model for Glitch Analysis in Logic Circuits ki-seok chung; Kim, Taewhan; c. l. liu, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.11, no.2, pp.137 - 154, 2002-04 | |
| Coupling delay optimization by temporal decorrelation using dual threshold voltage technique Kim, KW; Jung, SO; Kim, Taewhan; Saxena, P; Liu, CL; Kang, SM, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.11, pp.879 - 887, 2003-10 | |
| Memory access driven storage assignment for variables in embedded system design Choi, Yoonseo; Kim, Taewhan, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.15, no.2, pp.145 - 168, 2006-04 | |
| Coupling-aware high-level interconnect synthesis Lyuh, CG; Kim, Taewhan; Kim, KW, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.23, no.1, pp.157 - 164, 2004-01 | |
| Register allocation - A hierarchical reduction approach Chaeryung Park; Kim, Taewhan; C.L. Liu, JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, v.19, no.3, pp.269 - 285, 1998 | |
| Integration of code scheduling, memory allocation, and array binding for memory-access optimization Kim, Taewhan; Kim, Jungeun, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.26, no.1, pp.142 - 151, 2007-01 | |
| Optimal Bit-level Arithmetic Optimization for High-Speed Circuits Junhyung Um; Kim, Taewhan, ELECTRONICS LETTERS, v.36, no.5, pp.405 - 407, 2000-03 | |
| Minimum delay optimization for domino logic circuits - A coupling-aware approach Kim, KW; Jung, SO; Kim, Taewhan; Kang, SM, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.8, pp.203 - 213, 2003-04 | |
| Ontimal intratask dynamic voltage-scaling technique and its practical extensions Seo, J; Kim, Taewhan; Lee, Joonwon, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.25, no.1, pp.47 - 57, 2006-01 |
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