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Browse "RIMS Journal Papers" by Author Taewhan Kim

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Showing results 1 to 13 of 13

1	A New Approach to the Multiport Memory Allocation Problem in Data Path Synthesis Taewhan Kim; C.L. Liu, INTEGRATION-THE VLSI JOURNAL, v.19, no.3, pp.133 - 160, 1995-10
2	A Practical Approach to the Synthesis of Arithmetic Circuits using Carry-Save Adders Taewhan Kim; Junhyung Um, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.19, no.5, pp.615 - 624, 2000-05
3	A Scheduling Algorithm for Conditional Resource Sharing - A Hierarchical Reduction Approach Taewhan Kim; Noritake Yonezawa; Jane W.S. Liu; C.L. Liu, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.13, no.4, pp.425 - 438, 1994-04
4	A Scheduling Strategy for Tasks with Precedence and Conditional Execution Hideroni Nakazato; Jane W. S. Liu; Taewhan Kim, TRANSACTIONS OF INFORMATION PROCESSING SOCIETY OF JAPAN, v.36, no.9, pp.2161 - 2174, 1995-09
5	Accurate Exploration of Timing and Area Trade-offs in Arithmetic Optimization using Carry-Save-Adders Youngtae Kim; Taewhan Kim, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.10, no.5, pp.279 - 292, 2001-10
6	An Integrated Algorithm for Incremental Data Path Synthesis Taewhan Kim; C.L. Liu, JOURNAL OF VLSI SIGNAL PROCESSING, v.12, no.3, pp.265 - 285, 1996-06
7	An Integrated Approach to Data Path Synthesis for Behavioral-level Power Optimization Chaeryung Park; Taewhan Kim; C.L. Liu, VLSI DESIGN, v.11, no.4, pp.381 - 396, 2000
8	An Optimal Allocation of Carry-Save-Adders in Arithmetic Circuits Junhyung Um; Taewhan Kim, IEEE TRANSACTIONS ON COMPUTERS, v.50, no.3, pp.215 - 233, 2001-03
9	Circuit Optimization using Carry-Save-Adder Cells Taewhan Kim; William Jao; Steve Tjiang, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.17, no.10, pp.974 - 984, 1998-10
10	Comments on the Originality of the Paper, ``The Integrated Scheduling and Allocation of High-Level Test synthesis'' Taewhan Kim, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS, v.E82-A, no.12, pp.2833 - 2833, 1999-12
11	Coupling-Aware Minimum Delay Optimization for Domino Logic Circuits Ki-Wook Kim; Seong-Ook Jung; Taewhan Kim; Sung-Mo Kang, ELECTRONICS LETTERS, v.37, no.13, pp.813 - 814, 2001-06
12	Domino Logic Synthesis based on Implication Graph for Set of Mandatory Assignments Ki-Wook Kim; Taewhan Kim; C.L. Liu; Sung-Mo Kang, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.21, no.2, pp.232 - 240, 2002-02
13	Phase Assignment for the Synthesis of Low Power Domino Circuits Priyadasan Patra; Unni Narayanan; Taewhan Kim, ELECTRONICS LETTERS, v.37, no.13, pp.814 - 816, 2001-06

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